Flash Encryption is cannot be enabled - SecureBoot Enabled before  (IDFGH-9578)

Answers checklist.

[X] I have read the documentation ESP-IDF Programming Guide and the issue is not addressed there.
[X] I have updated my IDF branch (master or release) to the latest version and checked that the issue is present there.
[X] I have searched the issue tracker for a similar issue and not found a similar issue.

IDF version.
ESP-IDF v5.1-dev-3462-g045163a2ec-dirty
Operating System used.
macOS
How did you build your project?
Command line with CMake
If you are using Windows, please specify command line type.
None
Development Kit.
ESP32
Power Supply used.
USB
What is the expected behavior?
I expected that after enabling SecureBoot and then enable FlashEncryption in the IDF-Menuconfig. That the ESP with the newly flashed Bootloader will start the encrpytion process as described in the Manuals.
What is the actual behavior?
The Flash-Encryption is not working. If I try to flash the Image with the --encrypted Option I will get this Log:
Uploading stub...
Running stub...
Stub running...
Changing baud rate to 460800
Changed.
Configuring flash size...
Flash encryption key is not programmed

A fatal error occurred: Can't perform encrypted flash write, consult Flash Encryption documentation for more information
CMake Error at run_serial_tool.cmake:63 (message):

 /Users/USERNAME/.espressif/python_env/idf5.1_py3.10_env/bin/python;;/Users/USERNAME/esp/esp-idf/components/esptool_py/esptool/esptool.py;--chip;esp32
  failed.

FAILED: CMakeFiles/encrypted-flash /Users/USERNAME/esp/esp-idf/examples/system/ota/simple_ota_example/build/CMakeFiles/encrypted-flash
cd /Users/USERNAME/esp/esp-idf/components/esptool_py && /Users/USERNAME/.espressif/tools/cmake/3.24.0/CMake.app/Contents/bin/cmake -D IDF_PATH=/Users/USERNAME/esp/esp-idf -D "SERIAL_TOOL=/Users/USERNAME/.espressif/python_env/idf5.1_py3.10_env/bin/python;;/Users/USERNAME/esp/esp-idf/components/esptool_py/esptool/esptool.py;--chip;esp32" -D "SERIAL_TOOL_ARGS=--before=default_reset;--after=no_reset;write_flash;@encrypted_flash_args" -D WORKING_DIRECTORY=/Users/USERNAME/esp/esp-idf/examples/system/ota/simple_ota_example/build -P /Users/USERNAME/esp/esp-idf/components/esptool_py/run_serial_tool.cmake
ninja: build stopped: subcommand failed

Now then I try to flash it without the --encryped flag it seems to work but in the end its not the case as you can see in the Monitor Log:
rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
flash read err, 1000
ets_main.c 371
ets Jun  8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
flash read err, 1000
ets_main.c 371
ets Jun  8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
flash read err, 1000
ets_main.c 371
ets Jun  8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
flash read err, 1000
ets_main.c 371
ets Jun  8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
flash read err, 1000
ets_main.c 371
ets Jun  8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
flash read err, 1000
ets_main.c 371
ets Jun  8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
flash read err, 1000
ets_main.c 371
ets Jun  8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
flash read err, 1000
ets_main.c 371
ets Jun  8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
flash read err, 1000
ets_main.c 371
ets Jun  8 2016 00:22:57

Steps to reproduce.
So I did this Steps:

Enable SecureBoot
Create Private-Key
Create Bootloader
flash bootloader
=> Now Secure Boot works only signed binarys are executed
Enable Flash-Encryption
Create new Bootloader
Flash Bootloader
Burn this Efuse: FLASH_CRYPT_CONFIG
Flash-Encrytion should start after next flash.

Debug Logs.
Here you can find the EFuse Summary:

Calibration fuses:
BLK3_PART_RESERVE (BLOCK0):                        BLOCK3 partially served for ADC calibration data   = False R/W (0b0)
ADC_VREF (BLOCK0):                                 Voltage reference calibration                      = 1107 R/W (0b00001)

Config fuses:
XPD_SDIO_FORCE (BLOCK0):                           Ignore MTDI pin (GPIO12) for VDD_SDIO on reset     = False R/W (0b0)
XPD_SDIO_REG (BLOCK0):                             If XPD_SDIO_FORCE, enable VDD_SDIO reg on reset    = False R/W (0b0)
XPD_SDIO_TIEH (BLOCK0):                            If XPD_SDIO_FORCE & XPD_SDIO_REG                   = 1.8V R/W (0b0)
CLK8M_FREQ (BLOCK0):                               8MHz clock freq override                           = 57 R/W (0x39)
SPI_PAD_CONFIG_CLK (BLOCK0):                       Override SD_CLK pad (GPIO6/SPICLK)                 = 0 R/W (0b00000)
SPI_PAD_CONFIG_Q (BLOCK0):                         Override SD_DATA_0 pad (GPIO7/SPIQ)                = 0 R/W (0b00000)
SPI_PAD_CONFIG_D (BLOCK0):                         Override SD_DATA_1 pad (GPIO8/SPID)                = 0 R/W (0b00000)
SPI_PAD_CONFIG_HD (BLOCK0):                        Override SD_DATA_2 pad (GPIO9/SPIHD)               = 0 R/W (0b00000)
SPI_PAD_CONFIG_CS0 (BLOCK0):                       Override SD_CMD pad (GPIO11/SPICS0)                = 0 R/W (0b00000)
DISABLE_SDIO_HOST (BLOCK0):                        Disable SDIO host                                  = False R/W (0b0)

Efuse fuses:
WR_DIS (BLOCK0):                                   Efuse write disable mask                           = 256 R/W (0x0100)
RD_DIS (BLOCK0):                                   Efuse read disable mask                            = 2 R/W (0x2)
CODING_SCHEME (BLOCK0):                            Efuse variable block length scheme
   = NONE (BLK1-3 len=256 bits) R/W (0b00)
KEY_STATUS (BLOCK0):                               Usage of efuse block 3 (reserved)                  = False R/W (0b0)

Identity fuses:
MAC (BLOCK0):                                      Factory MAC Address
   = 58:bf:25:36:1e:dc (CRC 0x95 OK) R/W
MAC_CRC (BLOCK0):                                  CRC8 for factory MAC address                       = 149 R/W (0x95)
CHIP_VER_REV1 (BLOCK0):                            Silicon Revision 1                                 = True R/W (0b1)
CHIP_VER_REV2 (BLOCK0):                            Silicon Revision 2                                 = False R/W (0b0)
WAFER_VERSION_MINOR (BLOCK0):                      WAFER VERSION MINOR                                = 0 R/W (0b00)
CHIP_PACKAGE (BLOCK0):                             Chip package identifier                            = 0 R/W (0b000)
CHIP_PACKAGE_4BIT (BLOCK0):                        Chip package identifier #4bit                      = 0 R/W (0b0)
MAC_VERSION (BLOCK3):                              Version of the MAC field                           = 0 R/W (0x00)
WAFER_VERSION_MAJOR (BLOCK0):                      calc WAFER VERSION MAJOR from CHIP_VER_REV1 and CH = 1 R/W (0b001)
                                                   IP_VER_REV2 and apb_ctl_date (read only)
PKG_VERSION (BLOCK0):                              calc Chip package = CHIP_PACKAGE_4BIT << 3 + CHIP_ = 0 R/W (0x0)
                                                   PACKAGE (read only)

Security fuses:
FLASH_CRYPT_CNT (BLOCK0):                          Flash encryption mode counter                      = 1 R/W (0b0000001)
UART_DOWNLOAD_DIS (BLOCK0):                        Disable UART download mode (ESP32 rev3 only)       = False R/W (0b0)
FLASH_CRYPT_CONFIG (BLOCK0):                       Flash encryption config (key tweak bits)           = 15 R/W (0xf)
CONSOLE_DEBUG_DISABLE (BLOCK0):                    Disable ROM BASIC interpreter fallback             = True R/W (0b1)
ABS_DONE_0 (BLOCK0):                               Secure boot V1 is enabled for bootloader image     = True R/W (0b1)
ABS_DONE_1 (BLOCK0):                               Secure boot V2 is enabled for bootloader image     = False R/W (0b0)
JTAG_DISABLE (BLOCK0):                             Disable JTAG                                       = True R/W (0b1)
DISABLE_DL_ENCRYPT (BLOCK0):                       Disable flash encryption in UART bootloader        = False R/W (0b0)
DISABLE_DL_DECRYPT (BLOCK0):                       Disable flash decryption in UART bootloader        = False R/W (0b0)
DISABLE_DL_CACHE (BLOCK0):                         Disable flash cache in UART bootloader             = False R/W (0b0)
BLOCK1 (BLOCK1):                                   Flash encryption key
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK2 (BLOCK2):                                   Secure boot key
   = ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? -/-
BLOCK3 (BLOCK3):                                   Variable Block 3
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W

More Information.
No response

@DerPicknicker

FLASH_CRYPT_CNT (BLOCK0):                          Flash encryption mode counter                      = 1 R/W (0b0000001)

This suggest that the device has flash encryption enabled (odd count of set bits)
But there is no flash encryption key programmed in the BLOCK1. Probably you enabled or set the flash crypt cnt field externally and then flashed the bootloader with flash encryption enabled configuration.
Couple of ways to proceed now:

Please increase the FLASH_CRYPT_CNT field so that flash encryption gets disabled. Please refer to the command from documentation section here. After this, the plaintext bootloader should enable the flash encryption workflow and correctly program the key in the EFuse.
Burn the flash encryption key externally. Please refer to the documentation section here. Once you burn the key, encrypted-* commands should work to encrypt artifact before flashing.

Hope this helps!

If I get you correctly I should increase the field to disable the flash-encryption. Then the Encryption process will start automatically, right?

Yes

In option 2) you mentioned flashing the key externally is this a real security issue then I go to release later? I want the highest possible security to protect my Code and prevent flashing unofficial firmware.

If you generate per device unique key and carefully destroy it once its programmed in the device then it should not result in any security issue. Of-course, enabling flash encryption release mode through bootloader is more convenient option but here we are trying to recover this device first.

I will do it this evening and comeback to you.

Hi, I did it. But the result is the same. Flash Encryption is not starting. The idf.py Monitor shows the same as before (first Post) What should I do @mahavirj ..?
thank you for your time :)
FUSE_NAME (Block) Description  = [Meaningful Value] [Readable/Writeable] (Hex Value)
----------------------------------------------------------------------------------------
Calibration fuses:
BLK3_PART_RESERVE (BLOCK0):                        BLOCK3 partially served for ADC calibration data   = False R/W (0b0)
ADC_VREF (BLOCK0):                                 Voltage reference calibration                      = 1107 R/W (0b00001)

Config fuses:
XPD_SDIO_FORCE (BLOCK0):                           Ignore MTDI pin (GPIO12) for VDD_SDIO on reset     = False R/W (0b0)
XPD_SDIO_REG (BLOCK0):                             If XPD_SDIO_FORCE, enable VDD_SDIO reg on reset    = False R/W (0b0)
XPD_SDIO_TIEH (BLOCK0):                            If XPD_SDIO_FORCE & XPD_SDIO_REG                   = 1.8V R/W (0b0)
CLK8M_FREQ (BLOCK0):                               8MHz clock freq override                           = 57 R/W (0x39)
SPI_PAD_CONFIG_CLK (BLOCK0):                       Override SD_CLK pad (GPIO6/SPICLK)                 = 0 R/W (0b00000)
SPI_PAD_CONFIG_Q (BLOCK0):                         Override SD_DATA_0 pad (GPIO7/SPIQ)                = 0 R/W (0b00000)
SPI_PAD_CONFIG_D (BLOCK0):                         Override SD_DATA_1 pad (GPIO8/SPID)                = 0 R/W (0b00000)
SPI_PAD_CONFIG_HD (BLOCK0):                        Override SD_DATA_2 pad (GPIO9/SPIHD)               = 0 R/W (0b00000)
SPI_PAD_CONFIG_CS0 (BLOCK0):                       Override SD_CMD pad (GPIO11/SPICS0)                = 0 R/W (0b00000)
DISABLE_SDIO_HOST (BLOCK0):                        Disable SDIO host                                  = False R/W (0b0)

Efuse fuses:
WR_DIS (BLOCK0):                                   Efuse write disable mask                           = 256 R/W (0x0100)
RD_DIS (BLOCK0):                                   Efuse read disable mask                            = 2 R/W (0x2)
CODING_SCHEME (BLOCK0):                            Efuse variable block length scheme
   = NONE (BLK1-3 len=256 bits) R/W (0b00)
KEY_STATUS (BLOCK0):                               Usage of efuse block 3 (reserved)                  = False R/W (0b0)

Identity fuses:
MAC (BLOCK0):                                      Factory MAC Address
   = 58:bf:25:36:1e:dc (CRC 0x95 OK) R/W
MAC_CRC (BLOCK0):                                  CRC8 for factory MAC address                       = 149 R/W (0x95)
CHIP_VER_REV1 (BLOCK0):                            Silicon Revision 1                                 = True R/W (0b1)
CHIP_VER_REV2 (BLOCK0):                            Silicon Revision 2                                 = False R/W (0b0)
WAFER_VERSION_MINOR (BLOCK0):                      WAFER VERSION MINOR                                = 0 R/W (0b00)
CHIP_PACKAGE (BLOCK0):                             Chip package identifier                            = 0 R/W (0b000)
CHIP_PACKAGE_4BIT (BLOCK0):                        Chip package identifier #4bit                      = 0 R/W (0b0)
MAC_VERSION (BLOCK3):                              Version of the MAC field                           = 0 R/W (0x00)
WAFER_VERSION_MAJOR (BLOCK0):                      calc WAFER VERSION MAJOR from CHIP_VER_REV1 and CH = 1 R/W (0b001)
                                                   IP_VER_REV2 and apb_ctl_date (read only)
PKG_VERSION (BLOCK0):                              calc Chip package = CHIP_PACKAGE_4BIT << 3 + CHIP_ = 0 R/W (0x0)
                                                   PACKAGE (read only)

Security fuses:
FLASH_CRYPT_CNT (BLOCK0):                          Flash encryption mode counter                      = 3 R/W (0b0000011)
UART_DOWNLOAD_DIS (BLOCK0):                        Disable UART download mode (ESP32 rev3 only)       = False R/W (0b0)
FLASH_CRYPT_CONFIG (BLOCK0):                       Flash encryption config (key tweak bits)           = 15 R/W (0xf)
CONSOLE_DEBUG_DISABLE (BLOCK0):                    Disable ROM BASIC interpreter fallback             = True R/W (0b1)
ABS_DONE_0 (BLOCK0):                               Secure boot V1 is enabled for bootloader image     = True R/W (0b1)
ABS_DONE_1 (BLOCK0):                               Secure boot V2 is enabled for bootloader image     = False R/W (0b0)
JTAG_DISABLE (BLOCK0):                             Disable JTAG                                       = True R/W (0b1)
DISABLE_DL_ENCRYPT (BLOCK0):                       Disable flash encryption in UART bootloader        = False R/W (0b0)
DISABLE_DL_DECRYPT (BLOCK0):                       Disable flash decryption in UART bootloader        = False R/W (0b0)
DISABLE_DL_CACHE (BLOCK0):                         Disable flash cache in UART bootloader             = False R/W (0b0)
BLOCK1 (BLOCK1):                                   Flash encryption key
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK2 (BLOCK2):                                   Secure boot key
   = ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? -/-
BLOCK3 (BLOCK3):                                   Variable Block 3
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W

Flash voltage (VDD_SDIO) determined by GPIO12 on reset

The idf.py Monitor shows the same as before (first Post)

I hope you are flashing signed but plaintext bootloader now. You can also try with default bootloader generated without any security features enabled, it shall fail for the signature verification part but at-least it should not give flash read err, 1000.

The idf.py Monitor shows the same as before (first Post)

I hope you are flashing signed but plaintext bootloader now. You can also try with default bootloader generated without any security features enabled, it shall fail for the signature verification part but at-least it should not give flash read err, 1000.

I will double check that. Plaintext == disabled inside IDF - Menuconfig?

Interim, I noticed that you are using "secure boot v1" scheme here. If you are using ESP32 ECO3 and above revision then you should consider enabling "secure boot v2" scheme.
You can check the revision using: esptool.py chip_id command.
For "secure boot v1" case, if you had generated the key through the bootloader then reflashing the bootloader is not possible. It can potentially brick the device. Please refer to this guide

Flash Encryption Never worked. And yes I use V1 - After enabling, flashing bootloader, it displays me the mentioned logs. After disabling, re-flash new bootloader the esp32 works as expected. I will double check your ideas ;)

Yes, if you had the secure boot v1 key generated by the bootloader (and not externally programmed) then you can not re-flash the bootloader. In-fact, we have some measures in the esptool to prevent re-flashing bootloader image for this case, please see here.

But now it seems that I cannot recover my Device.

Since, you reflashed the bootloader (using --force) and the secure boot v1 key is not accessible outside (read-protected), there is no way to regenerate the digest again.
For future devices, please consider using "secure boot v2" scheme, provided you are using ESP32 with ECO3 or higher revision.

Hello @mahavirj ,
Thank you for the explanations. Before you close it. I already have an ESP-S3 (due the non-fixable secrurity issues on the esp32-board).
I don’t want to break that board again - how are the steps to enable both. Should I do it at the same time?

Enable SecureBoot
Enable FlashEncryption
Generate key for bootloader (how to select public key and not private key?)
Generate Bootloader
Flash bootloader
But then how should I proceed? Burn Fueses?

Could you make a short list (please don’t refer to the Documentation - I read them several times…) how the right order is to get SecureBoot as FlashEncryption running.
best regards

@mahavirj .. Any Updates on your Side?
I bought a new ESP32-S3. Is my Process described here correct? Or should I proceed in a different way?

Enable SecureBoot
Enable FlashEncryption
Generate key for bootloader (how to select public key and not private key?)
Generate Bootloader
Flash bootloader
But then how should I proceed? Burn Fueses?

Best regards :)

@DerPicknicker

Please enable required security features through idf.py menuconfig -> Security features
You may keep flash encryption in DEVELOPMENT mode for testing purpose
You may also keep some potentially insecure options enabled, like SECURE_INSECURE_ALLOW_DL_MODE enabled. This is to keep UART DL mode enabled and hence all esptool commands to be supported. Same thing for other options like JTAG etc.
Modify partition table offset, with security features bootloader size increases and hence partition table offset must be increased. Typically 0xd000 offset should work well here.
Build the project
Build system would notify regarding missing signing key and command to generate one. Execute the command to generate the signing key. This is private key which will be used to sign the artifacts but only public key (its digest) would be programmed in the EFuse by bootloader on very 1st boot.
If secure boot is enabled, then bootloader must be flashed separately. Please flash all other artifacts like partition table, application and then bootloader at the very last. Flashing commands would be displayed during the build process.
On the 1st boot, bootloader would verify, configure EFuses and encrypt all partitions. This process may take some time. Once this is over, device should restart and have all security features enabled in the EFuse.

Additionally, we also have a qemu (emulator) fork for ESP32 chip, you may use that to verify the security features workflow. Instructions are available here. Process would then be similar for other chips like ESP32-S3.
Hope this helps!

Hello @mahavirj ...
Thank you for the explanation. I made some screenshots of my current settings. I still face some problems. But I am not sure how to fix them.
Here are my Settings:

After I build the Project - I created a new Key. Then the flashing works fine. With the idf.py flash I flashed the entire project beside the Bootloader. Before I did this it seems that I am on a good way. Now I built a new bootloader.. Flashed it with the given command. And I got an issue regarding NVS - the app is not starting at this stage. I tried to re-flash the app with the idf.py command. But after flashing the boot loader I have some strange behaviour.
Here you see the Flash-Output, it fails at different Percentages. I tried different Baudrates (down to 1000...) If I use 9600 It goes up to around 70%..

FLASH-LOG
[915/917] Generating signed binary image
espsecure.py v4.5.1
1 signing key(s) found.
Signed 983040 bytes of data from /Users/USERNAME/esp/esp-idf/examples/system/ota/simple_ota_example.nosync/build/simple_ota-unsigned.bin. Signature sector now has 1 signature blocks.
Generated signed binary image /Users/USERNAME/esp/esp-idf/examples/system/ota/simple_ota_example.nosync/build/simple_ota.bin from /Users/USERNAME/esp/esp-idf/examples/system/ota/simple_ota_example.nosync/build/simple_ota-unsigned.bin
[916/917] cd /Users/USERNAME/esp/esp-idf/examples/system/ota/simple_ota_example.nosync/build/esp-idf/esptool_py && /Users/USERNAME/.espressif/python_env/idf5.1_py3.10_env/bin/python /Users/USERNAME/esp/esp-idf/components/partition_table/check_sizes.py --offset 0xd000 partition --type app /Users/USERNAME/esp/esp-idf/examples/system/ota/simple_ota_example.nosync/build/partition_table/partition-table.bin /Users/USERNAME/esp/esp-idf/examples/system/ota/simple_ota_example.nosync/build/simple_ota.bin
simple_ota.bin binary size 0xf1000 bytes. Smallest app partition is 0x100000 bytes. 0xf000 bytes (6%) free.
[916/917] cd /Users/USERNAME/esp/esp-idf/components/esptool_py && /Users/USERNAME/.espressif/tools/cmake/3.24.0/CMake.app/Contents/bin/cmake -D IDF_PATH=/Users/USERNAME/esp/esp-idf -D "SERIAL_TOOL=/Users/USERNAME/.espressif/python_env/idf5.1_py3.10_env/bin/python;;/Users/USERNAME/esp/esp-idf/components/esptool_py/esptool/esptool.py;--chip;esp32s3" -D "SERIAL_TOOL_ARGS=--before=default_reset;--after=no_reset;--no-stub;write_flash;@flash_args" -D WORKING_DIRECTORY=/Users/USERNAME/esp/esp-idf/examples/system/ota/simple_ota_example.nosync/build -P /Users/USERNAME/esp/esp-idf/components/esptool_py/run_serial_tool.cmake
esptool esp32s3 -p /dev/cu.usbmodem14301 -b 460800 --before=default_reset --after=no_reset --no-stub write_flash --flash_mode dio --flash_freq 80m --flash_size keep 0x20000 simple_ota.bin 0xd000 partition_table/partition-table.bin 0x12000 ota_data_initial.bin
esptool.py v4.5.1
Serial port /dev/cu.usbmodem14301
Connecting...
Chip is ESP32-S3 (revision v0.1)
Features: WiFi, BLE
Crystal is 40MHz
MAC: 34:85:18:98:15:f0
Changing baud rate to 460800
Changed.
Enabling default SPI flash mode...
Configuring flash size...
Flash will be erased from 0x00020000 to 0x00110fff...
Flash will be erased from 0x0000d000 to 0x0000dfff...
Flash will be erased from 0x00012000 to 0x00013fff...
Erasing flash...
Took 1.29s to erase flash block
Writing at 0x00020000... (0 %)
Writing at 0x00020400... (0 %)
Writing at 0x00020800... (0 %)
Writing at 0x00020c00... (0 %)
Writing at 0x00021000... (0 %)
Writing at 0x00021400... (0 %)
Writing at 0x00021800... (0 %)
Writing at 0x00021c00... (0 %)
Writing at 0x00022000... (0 %)
Writing at 0x00022400... (1 %)
Writing at 0x00022800... (1 %)
Writing at 0x00022c00... (1 %)
Writing at 0x00023000... (1 %)
Writing at 0x00023400... (1 %)
Writing at 0x00023800... (1 %)
Writing at 0x00023c00... (1 %)
Writing at 0x00024000... (1 %)
Writing at 0x00024400... (1 %)
Writing at 0x00024800... (1 %)
Writing at 0x00024c00... (2 %)
Writing at 0x00025000... (2 %)
Writing at 0x00025400... (2 %)
Writing at 0x00025800... (2 %)
Writing at 0x00025c00... (2 %)
Writing at 0x00026000... (2 %)
Writing at 0x00026400... (2 %)
Writing at 0x00026800... (2 %)
Writing at 0x00026c00... (2 %)
Writing at 0x00027000... (3 %)
Writing at 0x00027400... (3 %)
Writing at 0x00027800... (3 %)
Writing at 0x00027c00... (3 %)
Writing at 0x00028000... (3 %)
Writing at 0x00028400... (3 %)
Writing at 0x00028800... (3 %)
Writing at 0x00028c00... (3 %)
Writing at 0x00029000... (3 %)
Writing at 0x00029400... (3 %)
Writing at 0x00029800... (4 %)
Writing at 0x00029c00... (4 %)
Writing at 0x0002a000... (4 %)
Writing at 0x0002a400... (4 %)
Writing at 0x0002a800... (4 %)
Writing at 0x0002ac00... (4 %)
Writing at 0x0002b000... (4 %)
Writing at 0x0002b400... (4 %)
Writing at 0x0002b800... (4 %)
Writing at 0x0002bc00... (4 %)
Writing at 0x0002c000... (5 %)
Writing at 0x0002c400... (5 %)
Writing at 0x0002c800... (5 %)
Writing at 0x0002cc00... (5 %)
Writing at 0x0002d000... (5 %)
Writing at 0x0002d400... (5 %)
Writing at 0x0002d800... (5 %)
Writing at 0x0002dc00... (5 %)
Writing at 0x0002e000... (5 %)
Writing at 0x0002e400... (6 %)
Writing at 0x0002e800... (6 %)
Writing at 0x0002ec00... (6 %)
Writing at 0x0002f000... (6 %)
Writing at 0x0002f400... (6 %)
Writing at 0x0002f800... (6 %)
Writing at 0x0002fc00... (6 %)
Writing at 0x00030000... (6 %)
Writing at 0x00030400... (6 %)
Writing at 0x00030800... (6 %)
Writing at 0x00030c00... (7 %)
Writing at 0x00031000... (7 %)
Writing at 0x00031400... (7 %)
Writing at 0x00031800... (7 %)
Writing at 0x00031c00... (7 %)
Writing at 0x00032000... (7 %)
Writing at 0x00032400... (7 %)
Writing at 0x00032800... (7 %)
Writing at 0x00032c00... (7 %)
Writing at 0x00033000... (7 %)
Writing at 0x00033400... (8 %)
Writing at 0x00033800... (8 %)
Writing at 0x00033c00... (8 %)
Writing at 0x00034000... (8 %)
Writing at 0x00034400... (8 %)
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Writing at 0x00034c00... (8 %)
Writing at 0x00035000... (8 %)
Writing at 0x00035400... (8 %)
Writing at 0x00035800... (9 %)
Writing at 0x00035c00... (9 %)
Writing at 0x00036000... (9 %)
Writing at 0x00036400... (9 %)
Writing at 0x00036800... (9 %)
Writing at 0x00036c00... (9 %)
Writing at 0x00037000... (9 %)
Writing at 0x00037400... (9 %)
Writing at 0x00037800... (9 %)
Writing at 0x00037c00... (9 %)
Writing at 0x00038000... (10 %)
Writing at 0x00038400... (10 %)
Writing at 0x00038800... (10 %)
Writing at 0x00038c00... (10 %)
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Writing at 0x0003a000... (10 %)
Writing at 0x0003a400... (10 %)
Writing at 0x0003a800... (11 %)
Writing at 0x0003ac00... (11 %)
Writing at 0x0003b000... (11 %)
Writing at 0x0003b400... (11 %)
Writing at 0x0003b800... (11 %)
Writing at 0x0003bc00... (11 %)
Writing at 0x0003c000... (11 %)
Writing at 0x0003c400... (11 %)
Writing at 0x0003c800... (11 %)
Writing at 0x0003cc00... (12 %)
Writing at 0x0003d000... (12 %)
Writing at 0x0003d400... (12 %)
Writing at 0x0003d800... (12 %)
Writing at 0x0003dc00... (12 %)
Writing at 0x0003e000... (12 %)
Writing at 0x0003e400... (12 %)
Writing at 0x0003e800... (12 %)
Writing at 0x0003ec00... (12 %)
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Writing at 0x0003f400... (13 %)
Writing at 0x0003f800... (13 %)
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Writing at 0x00040000... (13 %)
Writing at 0x00040400... (13 %)
Writing at 0x00040800... (13 %)
Writing at 0x00040c00... (13 %)
Writing at 0x00041000... (13 %)
Writing at 0x00041400... (13 %)
Writing at 0x00041800... (14 %)
Writing at 0x00041c00... (14 %)
Writing at 0x00042000... (14 %)
Writing at 0x00042400... (14 %)
Writing at 0x00042800... (14 %)
Writing at 0x00042c00... (14 %)
Writing at 0x00043000... (14 %)
Writing at 0x00043400... (14 %)
Writing at 0x00043800... (14 %)
Writing at 0x00043c00... (14 %)
Writing at 0x00044000... (15 %)
Writing at 0x00044400... (15 %)
Writing at 0x00044800... (15 %)
Writing at 0x00044c00... (15 %)
Writing at 0x00045000... (15 %)
Writing at 0x00045400... (15 %)
Writing at 0x00045800... (15 %)
Writing at 0x00045c00... (15 %)
Writing at 0x00046000... (15 %)
Writing at 0x00046400... (15 %)
Writing at 0x00046800... (16 %)
Writing at 0x00046c00... (16 %)
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Writing at 0x00047400... (16 %)
Writing at 0x00047800... (16 %)
Writing at 0x00047c00... (16 %)
Writing at 0x00048000... (16 %)
Writing at 0x00048400... (16 %)
Writing at 0x00048800... (16 %)
Writing at 0x00048c00... (17 %)
Writing at 0x00049000... (17 %)
Writing at 0x00049400... (17 %)
Writing at 0x00049800... (17 %)
Writing at 0x00049c00... (17 %)
Writing at 0x0004a000... (17 %)
Writing at 0x0004a400... (17 %)
Writing at 0x0004a800... (17 %)
Writing at 0x0004ac00... (17 %)
Writing at 0x0004b000... (17 %)
Writing at 0x0004b400... (18 %)
Writing at 0x0004b800... (18 %)
Writing at 0x0004bc00... (18 %)
Writing at 0x0004c000... (18 %)
Writing at 0x0004c400... (18 %)
Writing at 0x0004c800... (18 %)
Writing at 0x0004cc00... (18 %)
Writing at 0x0004d000... (18 %)
Writing at 0x0004d400... (18 %)
Writing at 0x0004d800... (18 %)
Writing at 0x0004dc00... (19 %)
Writing at 0x0004e000... (19 %)
Writing at 0x0004e400... (19 %)
Writing at 0x0004e800... (19 %)
Writing at 0x0004ec00... (19 %)
Writing at 0x0004f000... (19 %)
Writing at 0x0004f400... (19 %)
Writing at 0x0004f800... (19 %)
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Writing at 0x00050000... (20 %)
Writing at 0x00050400... (20 %)
Writing at 0x00050800... (20 %)
Writing at 0x00050c00... (20 %)
Writing at 0x00051000... (20 %)
Writing at 0x00051400... (20 %)
Writing at 0x00051800... (20 %)
Writing at 0x00051c00... (20 %)
Writing at 0x00052000... (20 %)
Writing at 0x00052400... (20 %)
Writing at 0x00052800... (21 %)
Writing at 0x00052c00... (21 %)
Writing at 0x00053000... (21 %)
Writing at 0x00053400... (21 %)
Writing at 0x00053800... (21 %)
Writing at 0x00053c00... (21 %)
Writing at 0x00054000... (21 %)
Writing at 0x00054400... (21 %)
Writing at 0x00054800... (21 %)
Writing at 0x00054c00... (21 %)
Writing at 0x00055000... (22 %)
Writing at 0x00055400... (22 %)
Writing at 0x00055800... (22 %)
Writing at 0x00055c00... (22 %)
Writing at 0x00056000... (22 %)
Writing at 0x00056400... (22 %)
Writing at 0x00056800... (22 %)
Writing at 0x00056c00... (22 %)
Writing at 0x00057000... (22 %)
Writing at 0x00057400... (23 %)
Writing at 0x00057800... (23 %)
Writing at 0x00057c00... (23 %)
Writing at 0x00058000... (23 %)
Writing at 0x00058400... (23 %)
Writing at 0x00058800... (23 %)
Writing at 0x00058c00... (23 %)
Writing at 0x00059000... (23 %)
Writing at 0x00059400... (23 %)
Writing at 0x00059800... (23 %)
Writing at 0x00059c00... (24 %)
Writing at 0x0005a000... (24 %)
Writing at 0x0005a400... (24 %)
Writing at 0x0005a800... (24 %)
Writing at 0x0005ac00... (24 %)
Writing at 0x0005b000... (24 %)
Writing at 0x0005b400... (24 %)
Writing at 0x0005b800... (24 %)
Writing at 0x0005bc00... (24 %)
Writing at 0x0005c000... (25 %)
Writing at 0x0005c400... (25 %)
Writing at 0x0005c800... (25 %)
Writing at 0x0005cc00... (25 %)
Writing at 0x0005d000... (25 %)
Writing at 0x0005d400... (25 %)
Writing at 0x0005d800... (25 %)
Writing at 0x0005dc00... (25 %)
Writing at 0x0005e000... (25 %)
Writing at 0x0005e400... (25 %)
Writing at 0x0005e800... (26 %)
Writing at 0x0005ec00... (26 %)
Writing at 0x0005f000... (26 %)
Writing at 0x0005f400... (26 %)
Writing at 0x0005f800... (26 %)
Writing at 0x0005fc00... (26 %)
Writing at 0x00060000... (26 %)
Writing at 0x00060400... (26 %)
Writing at 0x00060800... (26 %)
Writing at 0x00060c00... (26 %)
Writing at 0x00061000... (27 %)
Writing at 0x00061400... (27 %)
Writing at 0x00061800... (27 %)
Writing at 0x00061c00... (27 %)
Writing at 0x00062000... (27 %)
Writing at 0x00062400... (27 %)
Writing at 0x00062800... (27 %)
Writing at 0x00062c00... (27 %)
Writing at 0x00063000... (27 %)
Writing at 0x00063400... (28 %)
Writing at 0x00063800... (28 %)
Writing at 0x00063c00... (28 %)
Writing at 0x00064000... (28 %)
Writing at 0x00064400... (28 %)
Writing at 0x00064800... (28 %)
Writing at 0x00064c00... (28 %)
Writing at 0x00065000... (28 %)
Writing at 0x00065400... (28 %)
Writing at 0x00065800... (28 %)
Writing at 0x00065c00... (29 %)
Writing at 0x00066000... (29 %)
Writing at 0x00066400... (29 %)
Writing at 0x00066800... (29 %)
Writing at 0x00066c00... (29 %)
Writing at 0x00067000... (29 %)
Writing at 0x00067400... (29 %)
Writing at 0x00067800... (29 %)
Writing at 0x00067c00... (29 %)
Writing at 0x00068000... (29 %)
Writing at 0x00068400... (30 %)
Writing at 0x00068800... (30 %)
Writing at 0x00068c00... (30 %)
Writing at 0x00069000... (30 %)
Writing at 0x00069400... (30 %)
Writing at 0x00069800... (30 %)
Writing at 0x00069c00... (30 %)
Writing at 0x0006a000... (30 %)
Writing at 0x0006a400... (30 %)
Writing at 0x0006a800... (31 %)
Writing at 0x0006ac00... (31 %)
Writing at 0x0006b000... (31 %)
Writing at 0x0006b400... (31 %)
Writing at 0x0006b800... (31 %)
Writing at 0x0006bc00... (31 %)
Writing at 0x0006c000... (31 %)
Writing at 0x0006c400... (31 %)
Writing at 0x0006c800... (31 %)
Writing at 0x0006cc00... (31 %)
Writing at 0x0006d000... (32 %)
Writing at 0x0006d400... (32 %)
Writing at 0x0006d800... (32 %)
Writing at 0x0006dc00... (32 %)
Writing at 0x0006e000... (32 %)
Writing at 0x0006e400... (32 %)
Writing at 0x0006e800... (32 %)
Writing at 0x0006ec00... (32 %)
Writing at 0x0006f000... (32 %)
Writing at 0x0006f400... (32 %)
Writing at 0x0006f800... (33 %)
Writing at 0x0006fc00... (33 %)
Writing at 0x00070000... (33 %)
Writing at 0x00070400... (33 %)
Writing at 0x00070800... (33 %)
Writing at 0x00070c00... (33 %)
Writing at 0x00071000... (33 %)
Writing at 0x00071400... (33 %)
Writing at 0x00071800... (33 %)
Writing at 0x00071c00... (34 %)
Writing at 0x00072000... (34 %)
Writing at 0x00072400... (34 %)
Writing at 0x00072800... (34 %)
Writing at 0x00072c00... (34 %)
Writing at 0x00073000... (34 %)
Writing at 0x00073400... (34 %)
Writing at 0x00073800... (34 %)
Writing at 0x00073c00... (34 %)
Writing at 0x00074000... (34 %)
Writing at 0x00074400... (35 %)
Writing at 0x00074800... (35 %)
Writing at 0x00074c00... (35 %)
Writing at 0x00075000... (35 %)
Writing at 0x00075400... (35 %)
Writing at 0x00075800... (35 %)
Writing at 0x00075c00... (35 %)
Writing at 0x00076000... (35 %)
Writing at 0x00076400... (35 %)
Writing at 0x00076800... (35 %)
Writing at 0x00076c00... (36 %)
Writing at 0x00077000... (36 %)
Writing at 0x00077400... (36 %)
Writing at 0x00077800... (36 %)
Writing at 0x00077c00... (36 %)
Writing at 0x00078000... (36 %)
Writing at 0x00078400... (36 %)
Writing at 0x00078800... (36 %)
Writing at 0x00078c00... (36 %)
Writing at 0x00079000... (37 %)
Writing at 0x00079400... (37 %)
Writing at 0x00079800... (37 %)
Writing at 0x00079c00... (37 %)
Writing at 0x0007a000... (37 %)
Writing at 0x0007a400... (37 %)
Writing at 0x0007a800... (37 %)
Writing at 0x0007ac00... (37 %)
Writing at 0x0007b000... (37 %)
Writing at 0x0007b400... (37 %)
Writing at 0x0007b800... (38 %)
Writing at 0x0007bc00... (38 %)
Writing at 0x0007c000... (38 %)
Writing at 0x0007c400... (38 %)
Writing at 0x0007c800... (38 %)
Writing at 0x0007cc00... (38 %)
Writing at 0x0007d000... (38 %)
Writing at 0x0007d400... (38 %)
Writing at 0x0007d800... (38 %)
Writing at 0x0007dc00... (39 %)
Writing at 0x0007e000... (39 %)
Writing at 0x0007e400... (39 %)
Writing at 0x0007e800... (39 %)
Writing at 0x0007ec00... (39 %)
Writing at 0x0007f000... (39 %)
Writing at 0x0007f400... (39 %)
Writing at 0x0007f800... (39 %)
Writing at 0x0007fc00... (39 %)
Writing at 0x00080000... (39 %)
Writing at 0x00080400... (40 %)
Writing at 0x00080800... (40 %)
Writing at 0x00080c00... (40 %)
Writing at 0x00081000... (40 %)
Writing at 0x00081400... (40 %)
Writing at 0x00081800... (40 %)
Writing at 0x00081c00... (40 %)
Writing at 0x00082000... (40 %)
Writing at 0x00082400... (40 %)
Writing at 0x00082800... (40 %)
Writing at 0x00082c00... (41 %)
Writing at 0x00083000... (41 %)
Writing at 0x00083400... (41 %)
Writing at 0x00083800... (41 %)
Writing at 0x00083c00... (41 %)
Writing at 0x00084000... (41 %)
Writing at 0x00084400... (41 %)
Writing at 0x00084800... (41 %)
Writing at 0x00084c00... (41 %)
Writing at 0x00085000... (42 %)
Writing at 0x00085400... (42 %)
Writing at 0x00085800... (42 %)
Writing at 0x00085c00... (42 %)
Writing at 0x00086000... (42 %)
Writing at 0x00086400... (42 %)
Writing at 0x00086800... (42 %)
Writing at 0x00086c00... (42 %)
Writing at 0x00087000... (42 %)
Writing at 0x00087400... (42 %)
Writing at 0x00087800... (43 %)
Writing at 0x00087c00... (43 %)
Writing at 0x00088000... (43 %)
Writing at 0x00088400... (43 %)
Writing at 0x00088800... (43 %)
Writing at 0x00088c00... (43 %)
Writing at 0x00089000... (43 %)
Writing at 0x00089400... (43 %)
Writing at 0x00089800... (43 %)
Writing at 0x00089c00... (43 %)
Writing at 0x0008a000... (44 %)
Writing at 0x0008a400... (44 %)
Writing at 0x0008a800... (44 %)
Writing at 0x0008ac00... (44 %)
Writing at 0x0008b000... (44 %)
Writing at 0x0008b400... (44 %)
Writing at 0x0008b800... (44 %)
Writing at 0x0008bc00... (44 %)
Writing at 0x0008c000... (44 %)
Writing at 0x0008c400... (45 %)
Writing at 0x0008c800... (45 %)
Writing at 0x0008cc00... (45 %)
Writing at 0x0008d000... (45 %)
Writing at 0x0008d400... (45 %)
Writing at 0x0008d800... (45 %)
Writing at 0x0008dc00... (45 %)
Writing at 0x0008e000... (45 %)
Writing at 0x0008e400... (45 %)
Writing at 0x0008e800... (45 %)
Writing at 0x0008ec00... (46 %)
Writing at 0x0008f000... (46 %)
Writing at 0x0008f400... (46 %)
Writing at 0x0008f800... (46 %)
Writing at 0x0008fc00... (46 %)
Writing at 0x00090000... (46 %)
Writing at 0x00090400... (46 %)
Writing at 0x00090800... (46 %)
Writing at 0x00090c00... (46 %)
Writing at 0x00091000... (46 %)
Writing at 0x00091400... (47 %)
Writing at 0x00091800... (47 %)
Writing at 0x00091c00... (47 %)
Writing at 0x00092000... (47 %)
Writing at 0x00092400... (47 %)
Writing at 0x00092800... (47 %)
Writing at 0x00092c00... (47 %)
Writing at 0x00093000... (47 %)
Writing at 0x00093400... (47 %)
Writing at 0x00093800... (48 %)
Writing at 0x00093c00... (48 %)
Writing at 0x00094000... (48 %)
Writing at 0x00094400... (48 %)
Writing at 0x00094800... (48 %)
Writing at 0x00094c00... (48 %)
Writing at 0x00095000... (48 %)
Writing at 0x00095400... (48 %)
Writing at 0x00095800... (48 %)
Writing at 0x00095c00... (48 %)
Writing at 0x00096000... (49 %)
Writing at 0x00096400... (49 %)
Writing at 0x00096800... (49 %)
Writing at 0x00096c00... (49 %)
Writing at 0x00097000... (49 %)
Writing at 0x00097400... (49 %)
Writing at 0x00097800... (49 %)
Writing at 0x00097c00... (49 %)
Writing at 0x00098000... (49 %)
Writing at 0x00098400... (50 %)
Writing at 0x00098800... (50 %)
Writing at 0x00098c00... (50 %)
Writing at 0x00099000... (50 %)
Writing at 0x00099400... (50 %)
Writing at 0x00099800... (50 %)
Writing at 0x00099c00... (50 %)
Writing at 0x0009a000... (50 %)
Writing at 0x0009a400... (50 %)
Writing at 0x0009a800... (50 %)
Writing at 0x0009ac00... (51 %)
Writing at 0x0009b000... (51 %)
Writing at 0x0009b400... (51 %)
Writing at 0x0009b800... (51 %)
Writing at 0x0009bc00... (51 %)
Writing at 0x0009c000... (51 %)
Writing at 0x0009c400... (51 %)
Writing at 0x0009c800... (51 %)
Writing at 0x0009cc00... (51 %)
Writing at 0x0009d000... (51 %)
Writing at 0x0009d400... (52 %)
Writing at 0x0009d800... (52 %)
Writing at 0x0009dc00... (52 %)
Writing at 0x0009e000... (52 %)
Writing at 0x0009e400... (52 %)
Writing at 0x0009e800... (52 %)
Writing at 0x0009ec00... (52 %)
Writing at 0x0009f000... (52 %)
Writing at 0x0009f400... (52 %)
Writing at 0x0009f800... (53 %)
Writing at 0x0009fc00... (53 %)
Writing at 0x000a0000... (53 %)
Writing at 0x000a0400... (53 %)
Writing at 0x000a0800... (53 %)
Writing at 0x000a0c00... (53 %)
Writing at 0x000a1000... (53 %)
Writing at 0x000a1400... (53 %)
Writing at 0x000a1800... (53 %)
Writing at 0x000a1c00... (53 %)
Writing at 0x000a2000... (54 %)
Writing at 0x000a2400... (54 %)
Writing at 0x000a2800... (54 %)
Writing at 0x000a2c00... (54 %)
Writing at 0x000a3000... (54 %)
Writing at 0x000a3400... (54 %)
Writing at 0x000a3800... (54 %)
Writing at 0x000a3c00... (54 %)
Writing at 0x000a4000... (54 %)
Writing at 0x000a4400... (54 %)
Writing at 0x000a4800... (55 %)
Writing at 0x000a4c00... (55 %)
Writing at 0x000a5000... (55 %)
Writing at 0x000a5400... (55 %)
Writing at 0x000a5800... (55 %)
Writing at 0x000a5c00... (55 %)
Writing at 0x000a6000... (55 %)
Writing at 0x000a6400... (55 %)
Writing at 0x000a6800... (55 %)
Writing at 0x000a6c00... (56 %)
Writing at 0x000a7000... (56 %)
Writing at 0x000a7400... (56 %)
Writing at 0x000a7800... (56 %)
Writing at 0x000a7c00... (56 %)
Writing at 0x000a8000... (56 %)
Writing at 0x000a8400... (56 %)
Writing at 0x000a8800... (56 %)
Writing at 0x000a8c00... (56 %)
Writing at 0x000a9000... (56 %)
Writing at 0x000a9400... (57 %)
Writing at 0x000a9800... (57 %)
Writing at 0x000a9c00... (57 %)
Writing at 0x000aa000... (57 %)
Writing at 0x000aa400... (57 %)
Writing at 0x000aa800... (57 %)
Writing at 0x000aac00... (57 %)
Writing at 0x000ab000... (57 %)
Writing at 0x000ab400... (57 %)
Writing at 0x000ab800... (57 %)
Writing at 0x000abc00... (58 %)
Writing at 0x000ac000... (58 %)
Writing at 0x000ac400... (58 %)
Writing at 0x000ac800... (58 %)
Writing at 0x000acc00... (58 %)
Writing at 0x000ad000... (58 %)
Writing at 0x000ad400... (58 %)
Writing at 0x000ad800... (58 %)
Writing at 0x000adc00... (58 %)
Writing at 0x000ae000... (59 %)
Writing at 0x000ae400... (59 %)
Writing at 0x000ae800... (59 %)
Writing at 0x000aec00... (59 %)
Writing at 0x000af000... (59 %)
Writing at 0x000af400... (59 %)
Writing at 0x000af800... (59 %)
Writing at 0x000afc00... (59 %)
Writing at 0x000b0000... (59 %)
Writing at 0x000b0400... (59 %)
Writing at 0x000b0800... (60 %)
Writing at 0x000b0c00... (60 %)
Writing at 0x000b1000... (60 %)
Writing at 0x000b1400... (60 %)

A serial exception error occurred: Could not configure port: (6, 'Device not configured')
Note: This error originates from pySerial. It is likely not a problem with esptool, but with the hardware connection or drivers.
For troubleshooting steps visit: https://docs.espressif.com/projects/esptool/en/latest/troubleshooting.html
CMake Error at run_serial_tool.cmake:63 (message):

  /Users/USERNAME/.espressif/python_env/idf5.1_py3.10_env/bin/python;;/Users/USERNAME/esp/esp-idf/components/esptool_py/esptool/esptool.py;--chip;esp32s3
  failed.

FAILED: CMakeFiles/flash /Users/USERNAME/esp/esp-idf/examples/system/ota/simple_ota_example.nosync/build/CMakeFiles/flash
cd /Users/USERNAME/esp/esp-idf/components/esptool_py && /Users/USERNAME/.espressif/tools/cmake/3.24.0/CMake.app/Contents/bin/cmake -D IDF_PATH=/Users/USERNAME/esp/esp-idf -D "SERIAL_TOOL=/Users/USERNAME/.espressif/python_env/idf5.1_py3.10_env/bin/python;;/Users/USERNAME/esp/esp-idf/components/esptool_py/esptool/esptool.py;--chip;esp32s3" -D "SERIAL_TOOL_ARGS=--before=default_reset;--after=no_reset;--no-stub;write_flash;@flash_args" -D WORKING_DIRECTORY=/Users/USERNAME/esp/esp-idf/examples/system/ota/simple_ota_example.nosync/build -P /Users/USERNAME/esp/esp-idf/components/esptool_py/run_serial_tool.cmake
ninja: build stopped: subcommand failed.

Now I checked the EFUSEs they seem now correct (I DID NOT BURN ANY FUSES MANUALLY!):
espefuse.py v4.5
Connecting...
Detecting chip type... ESP32-S3

=== Run "summary" command ===
EFUSE_NAME (Block) Description  = [Meaningful Value] [Readable/Writeable] (Hex Value)
----------------------------------------------------------------------------------------
Calibration fuses:
TEMP_SENSOR_CAL (BLOCK2)                           ??? Temperature calibration                        = -10.600000000000001 R/W (0b101101010)
ADC1_MODE0_D2 (BLOCK2)                             ??? ADC1 calibration 1                             = -432 R/W (0xec)
ADC1_MODE1_D2 (BLOCK2)                             ??? ADC1 calibration 2                             = 188 R/W (0x2f)
ADC1_MODE2_D2 (BLOCK2)                             ??? ADC1 calibration 3                             = -368 R/W (0xdc)
ADC1_MODE3_D2 (BLOCK2)                             ??? ADC1 calibration 4                             = -232 R/W (0xba)
ADC2_MODE0_D2 (BLOCK2)                             ??? ADC2 calibration 5                             = -312 R/W (0xce)
ADC2_MODE1_D2 (BLOCK2)                             ??? ADC2 calibration 6                             = 64 R/W (0x10)
ADC2_MODE2_D2 (BLOCK2)                             ??? ADC2 calibration 7                             = -328 R/W (0xd2)
ADC2_MODE3_D2 (BLOCK2)                             ??? ADC2 calibration 8                             = -256 R/W (0xc0)
ADC1_MODE0_D1 (BLOCK2)                             ??? ADC1 calibration 9                             = 0 R/W (0b100000)
ADC1_MODE1_D1 (BLOCK2)                             ??? ADC1 calibration 10                            = -12 R/W (0b100011)
ADC1_MODE2_D1 (BLOCK2)                             ??? ADC1 calibration 11                            = 44 R/W (0b001011)
ADC1_MODE3_D1 (BLOCK2)                             ??? ADC1 calibration 12                            = -92 R/W (0b110111)
ADC2_MODE0_D1 (BLOCK2)                             ??? ADC2 calibration 13                            = -80 R/W (0b110100)
ADC2_MODE1_D1 (BLOCK2)                             ??? ADC2 calibration 14                            = -44 R/W (0b101011)
ADC2_MODE2_D1 (BLOCK2)                             ??? ADC2 calibration 15                            = -96 R/W (0b111000)
ADC2_MODE3_D1 (BLOCK2)                             ??? ADC2 calibration 16                            = 68 R/W (0b010001)

Config fuses:
DIS_ICACHE (BLOCK0)                                Disables ICache                                    = False R/W (0b0)
DIS_DCACHE (BLOCK0)                                Disables DCache                                    = False R/W (0b0)
DIS_DOWNLOAD_ICACHE (BLOCK0)                       Disables Icache when SoC is in Download mode       = False R/W (0b0)
DIS_DOWNLOAD_DCACHE (BLOCK0)                       Disables Dcache when SoC is in Download mode       = False R/W (0b0)
DIS_FORCE_DOWNLOAD (BLOCK0)                        Disables forcing chip into Download mode           = False R/W (0b0)
DIS_CAN (BLOCK0)                                   Disables the TWAI Controller hardware              = False R/W (0b0)
DIS_APP_CPU (BLOCK0)                               Disables APP CPU                                   = False R/W (0b0)
FLASH_TPUW (BLOCK0)                                Configures flash startup delay after SoC power-up, = 0 R/W (0x0)
                                                    unit is (ms/2). When the value is 15, delay is 7.
                                                   5 ms
DIS_DIRECT_BOOT (BLOCK0)                           Disables direct boot mode                          = True R/W (0b1)
DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0)             Disables USB-Serial-JTAG ROM printing              = False R/W (0b0)
FLASH_ECC_MODE (BLOCK0)                            Configures the ECC mode for SPI flash
   = 16-byte to 18-byte mode R/W (0b0)
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0)         Disables USB-Serial-JTAG download feature in UART  = False R/W (0b0)
                                                   download boot mode
UART_PRINT_CONTROL (BLOCK0)                        Sets the default UART boot message output mode     = Enabled R/W (0b00)
FLASH_TYPE (BLOCK0)                                Selects SPI flash type                             = 4 data lines R/W (0b0)
FLASH_PAGE_SIZE (BLOCK0)                           Sets the size of flash page                        = 0 R/W (0b00)
FLASH_ECC_EN (BLOCK0)                              Enables ECC in Flash boot mode                     = False R/W (0b0)
FORCE_SEND_RESUME (BLOCK0)                         Forces ROM code to send an SPI flash resume comman = False R/W (0b0)
                                                   d during SPI boot
DIS_USB_OTG_DOWNLOAD_MODE (BLOCK0)                 Disables USB-OTG download feature in UART download = False R/W (0b0)
                                                    boot mode
DISABLE_WAFER_VERSION_MAJOR (BLOCK0)               Disables check of wafer version major              = False R/W (0b0)
DISABLE_BLK_VERSION_MAJOR (BLOCK0)                 Disables check of blk version major                = False R/W (0b0)
BLOCK_USR_DATA (BLOCK3)                            User data
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W

Efuse fuses:
WR_DIS (BLOCK0)                                    Disables programming of individual eFuses          = 25166593 R/W (0x01800301)
RD_DIS (BLOCK0)                                    Disables software reading from BLOCK4-10           = 2 R/- (0b0000010)

Identity fuses:
SECURE_VERSION (BLOCK0)                            Secure version (used by ESP-IDF anti-rollback feat = 0 R/W (0x0000)
                                                   ure)
MAC (BLOCK1)                                       Factory MAC Address
   = 34:85:18:98:15:f0 (OK) R/W
WAFER_VERSION_MINOR_LO (BLOCK1)                    WAFER_VERSION_MINOR least significant bits         = 1 R/W (0b001)
PKG_VERSION (BLOCK1)                               Package version                                    = 0 R/W (0b000)
BLK_VERSION_MINOR (BLOCK1)                         BLOCK version minor                                = 2 R/W (0b010)
WAFER_VERSION_MINOR_HI (BLOCK1)                    WAFER_VERSION_MINOR most significant bits          = 0 R/W (0b0)
WAFER_VERSION_MAJOR (BLOCK1)                       WAFER_VERSION_MAJOR                                = 0 R/W (0b00)
OPTIONAL_UNIQUE_ID (BLOCK2)                        Optional unique 128-bit ID
   = 95 33 db b9 5a b6 44 57 33 19 b6 3f 4c 4d 2b 3a R/W
BLK_VERSION_MAJOR (BLOCK2)                         BLOCK version major                                = With calibration R/W (0b01)
CUSTOM_MAC (BLOCK3)                                Custom MAC Address
   = 00:00:00:00:00:00 (OK) R/W
WAFER_VERSION_MINOR (BLOCK0)                       calc WAFER VERSION MINOR = WAFER_VERSION_MINOR_HI  = 1 R/W (0x1)
                                                   << 3 + WAFER_VERSION_MINOR_LO (read only)

Security fuses:
SOFT_DIS_JTAG (BLOCK0)                             Software disables JTAG by programming odd number o = 0 R/W (0b000)
                                                   f 1 bit(s). JTAG can be re-enabled via HMAC periph
                                                   eral
HARD_DIS_JTAG (BLOCK0)                             Hardware disables JTAG permanently                 = False R/W (0b0)
DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0)               Disables flash encryption when in download boot mo = False R/W (0b0)
                                                   des
SPI_BOOT_CRYPT_CNT (BLOCK0)                        Enables encryption and decryption, when an SPI boo = Enable R/W (0b001)
                                                   t mode is set. Enabled when 1 or 3 bits are set,di
                                                   sabled otherwise
SECURE_BOOT_KEY_REVOKE0 (BLOCK0)                   Revokes use of secure boot key digest 0            = False R/W (0b0)
SECURE_BOOT_KEY_REVOKE1 (BLOCK0)                   Revokes use of secure boot key digest 1            = True R/W (0b1)
SECURE_BOOT_KEY_REVOKE2 (BLOCK0)                   Revokes use of secure boot key digest 2            = True R/W (0b1)
KEY_PURPOSE_0 (BLOCK0)                             KEY0 purpose                                       = SECURE_BOOT_DIGEST0 R/- (0x9)
KEY_PURPOSE_1 (BLOCK0)                             KEY1 purpose                                       = XTS_AES_128_KEY R/- (0x4)
KEY_PURPOSE_2 (BLOCK0)                             KEY2 purpose                                       = USER R/W (0x0)
KEY_PURPOSE_3 (BLOCK0)                             KEY3 purpose                                       = USER R/W (0x0)
KEY_PURPOSE_4 (BLOCK0)                             KEY4 purpose                                       = USER R/W (0x0)
KEY_PURPOSE_5 (BLOCK0)                             KEY5 purpose                                       = USER R/W (0x0)
SECURE_BOOT_EN (BLOCK0)                            Enables secure boot                                = True R/W (0b1)
SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0)             Enables aggressive secure boot key revocation mode = False R/W (0b0)
STRAP_JTAG_SEL (BLOCK0)                            Enable selection between usb_to_jtagor pad_to_jtag = False R/W (0b0)
                                                    through GPIO3
DIS_DOWNLOAD_MODE (BLOCK0)                         Disables all Download boot modes                   = False R/W (0b0)
ENABLE_SECURITY_DOWNLOAD (BLOCK0)                  Enables secure UART download mode (read/write flas = False R/W (0b0)
                                                   h only)
BLOCK_KEY0 (BLOCK4)
  Purpose: SECURE_BOOT_DIGEST0
  Encryption key0 or user data
   = REMOVED DUE PRIVACY CONCERNS R/-
BLOCK_KEY1 (BLOCK5)
  Purpose: XTS_AES_128_KEY
    Encryption key1 or user data
   = ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? -/-
BLOCK_KEY2 (BLOCK6)
  Purpose: USER
               Encryption key2 or user data
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY3 (BLOCK7)
  Purpose: USER
               Encryption key3 or user data
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY4 (BLOCK8)
  Purpose: USER
               Encryption key4 or user data
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY5 (BLOCK9)
  Purpose: USER
               Encryption key5 or user data
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_SYS_DATA2 (BLOCK10)                          System data (part 2)
   = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W

Spi_Pad_Config fuses:
SPI_PAD_CONFIG_CLK (BLOCK1)                        SPI CLK pad                                        = 0 R/W (0b000000)
SPI_PAD_CONFIG_Q (BLOCK1)                          SPI Q (D1) pad                                     = 0 R/W (0b000000)
SPI_PAD_CONFIG_D (BLOCK1)                          SPI D (D0) pad                                     = 0 R/W (0b000000)
SPI_PAD_CONFIG_CS (BLOCK1)                         SPI CS pad                                         = 0 R/W (0b000000)
SPI_PAD_CONFIG_HD (BLOCK1)                         SPI HD (D3) pad                                    = 0 R/W (0b000000)
SPI_PAD_CONFIG_WP (BLOCK1)                         SPI WP (D2) pad                                    = 0 R/W (0b000000)
SPI_PAD_CONFIG_DQS (BLOCK1)                        SPI DQS pad                                        = 0 R/W (0b000000)
SPI_PAD_CONFIG_D4 (BLOCK1)                         SPI D4 pad                                         = 0 R/W (0b000000)
SPI_PAD_CONFIG_D5 (BLOCK1)                         SPI D5 pad                                         = 0 R/W (0b000000)
SPI_PAD_CONFIG_D6 (BLOCK1)                         SPI D6 pad                                         = 0 R/W (0b000000)
SPI_PAD_CONFIG_D7 (BLOCK1)                         SPI D7 pad                                         = 0 R/W (0b000000)

Usb Config fuses:
DIS_USB (BLOCK0)                                   Disables the USB OTG hardware                      = False R/W (0b0)
USB_EXCHG_PINS (BLOCK0)                            Exchanges USB D+ and D- pins                       = False R/W (0b0)
EXT_PHY_ENABLE (BLOCK0)                            Enables external USB PHY                           = False R/W (0b0)
BTLC_GPIO_ENABLE (BLOCK0)                          Enables BTLC GPIO                                  = 0 R/W (0b00)
DIS_USB_JTAG (BLOCK0)                              Disable usb_serial_jtag-to-jtag function           = False R/W (0b0)
DIS_USB_SERIAL_JTAG (BLOCK0)                       Disable usb_serial_jtag module                     = False R/W (0b0)
USB_PHY_SEL (BLOCK0)                               Select internal/external PHY for USB OTGand usb_se = False R/W (0b0)
                                                   rial_jtag

Vdd_Spi Config fuses:
VDD_SPI_XPD (BLOCK0)                               The VDD_SPI regulator is powered on                = True R/W (0b1)
VDD_SPI_TIEH (BLOCK0)                              The VDD_SPI power supply voltage at reset
   = Connect to VDD_RTC_IO R/W (0b1)
VDD_SPI_FORCE (BLOCK0)                             Force using VDD_SPI_XPD and VDD_SPI_TIEH to config = True R/W (0b1)
                                                   ure VDD_SPI LDO
PIN_POWER_SELECTION (BLOCK0)                       Sets default power supply for GPIO33..37           = VDD_SPI R/W (0b1)

Wdt Config fuses:
WDT_DELAY_SEL (BLOCK0)                             Selects RTC WDT timeout threshold at startup       = 0 R/W (0b00)

Flash voltage (VDD_SPI) set to 3.3V by efuse.

After I checked the EFUSEs wanted to clarify that the Flash-Size is correct:
esptool.py --p /dev/cu.usbmodem14301 chip_id
esptool.py v4.5
Serial port /dev/cu.usbmodem14301
Connecting...
Detecting chip type... ESP32-S3
Chip is ESP32-S3 (revision v0.1)
Features: WiFi, BLE
Crystal is 40MHz
MAC: 34:85:18:98:15:f0
Uploading stub...
Running stub...

A fatal error occurred: Invalid head of packet (0x45): Possible serial noise or corruption.

This are all steps which I have done to troubleshoot the Behaviour. Now I don't have any Idea what's caused the Problem. Did I destroyed another Board?
I also tried the following:

Restarted my Macbook
Installed latest Version of ESPTOOL and Pyserial
Use a different USB-C Port on my Machine
Nothing works in the end - please help me to find out why I am stuck again ;)

@mahavirj .. Should I try to flash it with an windows machine  instead?

@DerPicknicker
As per the logs you shared above, I think all security features have been correctly enabled. Just a note, please do take a backup of the generated secure signing key.

A fatal error occurred: Invalid head of packet (0x45): Possible serial noise or corruption.

Troubleshooting guide has some tips, primarily faulty USB cable. I would recommend that you try replacing it with new one..

@mahavirj ..
I will try that - just for my information:
If I lost the key I cannot flash the code to the device due the fact that the bootloader requires my Signature, right?
Can I change the Signature after I flashed it to the device? Now I develop my code and test a lot. Now I change the key to a new one. Can I update the signature?
Best regards.

If I lost the key I cannot flash the code to the device due the fact that the bootloader requires my Signature, right?

Yes. Both bootloader and  the application are signed.

Can I change the Signature after I flashed it to the device? Now I develop my code and test a lot. Now I change the key to a new one. Can I update the signature?

No. The hash of the public key goes inside the device EFuse and hence for that device bootloader/application MUST be signed by the corresponding private key. Please see this technical write-up.

@mahavirj ..
I tried now a different USB-Cable but the behaviour is still the same. Until 54% and then it breaks up. I don't know why..
Here is an Image of my Board, it supports also flashing via UART, should I try that? Currently I use the USB-Connection built-in the esp32-s3..
I use the USB-C port on the left...

@DerPicknicker
Can you please try with esptool v4.5.1 once? Please see https://github.com/espressif/esptool/releases/tag/v4.5.1
You can install it using pip install esptool==4.5.1

I double checked it @mahavirj .. I already use the Version 4.5.1 ..

The chip cannot be put into download mode on this port:
Serial port /dev/cu.wchusbserial51850136391
Connecting......................................

It could help to hold the BOOT button on the board until flashing is started. It is also possible that the port is wrong and the device is not connected to that port.
As regarding the previous flashing attempts through the other port: I don't have another idea. The flashing stops randomly if the serial connection is not stable. Lower baud rate, different USB cable, port or driver could help. Sometimes adding a USB hub between the computer and the board also helps.
What is the version of your macOS and device?

Hi @dobairoland ..
First of all thank you for your help. The board has two ports:

One Port directly connected to the esp32-s3 Chips
I tried: different cable usb-a to usb-c and usb-c to usb-c. The USB-A cable was connected to the MacBook via an USB-C hub.
I also lowered the baudrate down to 1000…

One port which connects the esp32-s3 via an Serial to USB chip
For that I tried pressing the boot-button => Still no luck.

I use an 2017 MacBook Pro with macOS Ventura. I already ordered a new board. Should I try to flash this board without secure boot / flash encryption? And after several times, flash the firmware with all security features enabled to see if the issue is reproducible?
best regards

Should I try to flash this board without secure boot / flash encryption?

Yes. Don't enable secure boot or flash encryption until you are able to reliable flash an unencrypted application.

Hi @dobairoland ... ,
I tried now a new ESP32-Board. With this flashing works without any problems... I tried it several times. It seems that it's not a problem with my Machine or the USB-Port.
Now I tried the other Board with security Features enabled - flashing doesn't work and still doesn't work properly..  It still doesn't finish successfully...
Writing at 0x0009cc00... (51 %)
Writing at 0x0009d000... (51 %)
A serial exception error occurred: Could not configure port: (6, 'Device not configured')
Note: This error originates from pySerial. It is likely not a problem with esptool, but with the hardware connection or drivers.
For troubleshooting steps visit: https://docs.espressif.com/projects/esptool/en/latest/troubleshooting.html
CMake Error at run_serial_tool.cmake:63 (message):
And yes: I tried a different Cable, Port, lowering the baud rate. I don't have any other Ideas to fix that problem.

One day later.. I tried the same Board but flashing via the Serial Adapter on the Board works. But the Flashing via the integrated USB-Function of the S3 Board is totally broken until now.
But now I found out how I can re-flash the Board successfully.. Pressing the BOOT and RST together the output via Serial-interface stops and the IDF.py flash works fine.
It seems that the Board requires some pressed HW to set the board again into download mode. But this is only needed if your Serial Connection is heavly used.
But the ESP32-S3 still doesnt boot successfully. could you Help me with that again @mahavirj and @dobairoland ..?
Here is the current output:
98 size=00dd0h (  3536) load
[0m
, continuing..
I (405) boot: Checking flash encryption...
I (417) boot: Disabling RNG early entropy source...
I (434) cpu_start: Starting app cpu, entry point is 0x403I (457) cpu_start: App version:      v5.1-dev-3462-g04516I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g045163a2ec-dirty
I (483) cpu_start: Min chip rev:     v0.0
c allocation:
I (524) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
I (531) spi_flash: detected chip: gd
W (538) spi_flash: Detected size(16384k) larger than the size in the binary image header(4096k). Using the size in the binary image header.
W (552) flash_encrypt: Flash encryption mode is DEVELOPMENT (not secure)
I (560) sleep: Configure to isolate all GPIO pins in sleep state
I (566) sleep: Enable automatic switching of GPIO sleep configuration
I (573) app_start: Starting scheduler on CPU0
I (578) app_start: Starting scheduler on CPU1
I (578) main_task: Started on CPU0
I (588) main_task: Calling app_main()
I (588) simple_ota_example: OTA example app_main start
tition with subtype nvs_keys found in the partition table.
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
func: app_main
expression: err
0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2ea0 0x4037f7c5:0x3fca2ed0
ELF file SHA256: 83f8adcf9eb2f38b
Rebooting...
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
Saved PC:0x40375788
Valid secure boot key blocks: 0
load:0x403c9700,len:0xbe8
load:0x403cc700,len:0x528c
I (69) boot: ESP-IDF v5.1-dev-3462-g045163a2ec-dirty 2nd I (71) boot: chip revision: v0.1
I (75) boot.esp32s3: Boot SPI Speed : 80MHz
I (79) boot.esp32s3: SPI Mode       : DIO
I (84) boot.esp32s3: SPI Flash Size : 4MB
I (89) boot: Enabling RNG early entropy source...
I (94) boot: Partition Table:
I (98) boot: ## Label            Usage          Type ST Offset   Length
I (105) boot:  0 nvs              WiFi data        01 02 0000e000 00004000
I (113) boot:  1 otadata          OTA data         01 00 00012000 00002000
00020000 00100000
I (135) boot:  4 ota_0            OTA app          00 10 00120000 00100000
I (159) esp_image: segment 0: paddr=00020020 vaddr=3c0a0020 size=3cb58h (248664) map
98 size=00dd0h (  3536) load
00 size=12d18h ( 77080) load
I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=000000I (376) secure_boot_v2: Verifying with RSA-PSS...
I (383) secure_boot_v2: Signature verified successfully!I (394) secure_boot_v2: enabling secure boot v2...
I (397) secure_boot_v2: secure boot v2 is already enabled, continuing..
I (449) cpu_start: cpu freq: 160000000 Hz
I (449) cpu_start: Application information:
I (452) cpu_start: Project name:     simple_ota
I (457) cpu_start: App version:      v5.1-dev-3462-g045163a2ec-dirty
I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19
I (470) cpu_start: ELF file SHA256:  83f8adcf9eb2f38b...
I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g045163a2ec-dirty
I (483) cpu_start: Min chip rev:     v0.0
I (488) cpu_start: Max chip rev:     v0.99
I (493) cpu_start: Chip rev:         v0.1
I (505) heap_init: At 3FC9F1E0 len 0004A530 (297 KiB): DRI (511) heap_init: At 3FCE9710 len 00005724 (21 KiB): STAI (518) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (531) spi_flash: detected chip: gd
I (534) spi_flash: flash io: dio
W (538) spi_flash: Detected size(16384k) larger than the W (551) flash_encrypt: Flash encryption mode is DEVELOPMEI (560) sleep: Configure to isolate all GPIO pins in sleeI (566) sleep: Enable automatic switching of GPIO sleep cI (578) main_task: Started on CPU0
I (588) main_task: Calling app_main()
093df
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/sfunc: app_main
expression: err
abort() was called at PC 0x4037cdeb on core 0
Backtrace: 0x4037592e:0x3fca2d90 0x4037cdf5:0x3fca2db0 0x40383626:0x3fca2ddea0 0x4037f7c5:0x3fca2ed0
ELF file SHA256: 83f8adcf9eb2rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x40375788
SPIWP:0xee
mode:DIO, clock div:1
load:0x403cc700,len:0x528c
entry 0x403c9904
stage bootloader
I (84) boot.esp32s3: SPI Flash Size : 4MB
I (89) boot: Enabling RNG early entropy source...
I (105) boot:  0 nvs              WiFi data        01 02 0000e000 00004000
00012000 00002000
I (120) boot:  2 phy_init         RF data          01 01 00014000 00001000
I (128) boot:  3 factory          factory app      00 00 I (135) boot:  4 ota_0            OTA app          00 10 I (151) boot: End of partition table
I (155) boot: Defaulting to factory image
00 size=03498h ( 13464) load
I (221) esp_image: segment 2: paddr=00060020 vaddr=420000I (348) esp_image: segment 3: paddr=000f9100 vaddr=3fc9a298 size=00dd0h (  3536) load
00 size=12d18h ( 77080) load
I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=000000
I (394) secure_boot_v2: enabling secure boot v2...
I (397) secure_boot_v2: secure boot v2 is already enabled, continuing..
I (409) flash_encrypt: flash encryption is enabled (1 plaintext flashes left)
I (417) boot: Disabling RNG early entropy source...
I (434) cpu_start: Pro cpu up.
I (0) cpu_start: App cpu up.
I (449) cpu_start: Pro cpu start user code
I (449) cpu_start: Application information:
I (452) cpu_start: Project name:     simple_ota
I (457) cpu_start: App version:      v5.1-dev-3462-g045163a2ec-dirty
I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19
I (470) cpu_start: ELF file SHA256:  83f8adcf9eb2f38b...
I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g045163a2ec-dirty
I (493) cpu_start: Chip rev:         v0.1
I (498) heap_init: Initializing. RAM available for dynamiI (518) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (524) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
W (538) spi_flash: Detected size(16384k) larger than the I (560) sleep: Configure to isolate all GPIO pins in sleep state
I (578) main_task: Started on CPU0
I (588) simple_ota_example: OTA example app_main startition with subtype nvs_keys found in the partition table.
093df
expression: err
abort() was called at PC 0x4037cdeb on core 0
Backtrace: 0x4037592e:0x3fca2d90 0x4037cdf5:0x3fca2db0 0x40383626:0x3fca2ddf38b
Rebooting...
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x40375788
SPIWP:0xee
mode:DIO, clock div:1
Valid secure boot key blocks: 0
load:0x403c9700,len:0xbe8
I (70) boot: compile time Mar 13 2023 19:36:30
I (71) boot: chip revision: v0.1
I (75) boot.esp32s3: Boot SPI Speed : 80MHz
I (84) boot.esp32s3: SPI Flash Size : 4MB
I (89) boot: Enabling RNG early entropy source...
I (94) boot: Partition Table:
I (98) boot: ## Label            Usage          Type ST OI (105) boot:  0 nvs              WiFi data        01 02 0000e000 00004000
00012000 00002000
I (120) boot:  2 phy_init         RF data          01 01 00014000 00001000
00020000 00100000
I (155) boot: Defaulting to factory image
I (159) esp_image: segment 0: paddr=00020020 vaddr=3c0a00I (217) esp_image: segment 1: paddr=0005cb80 vaddr=3fc96e00 size=03498h ( 13464) load
I (221) esp_image: segment 2: paddr=00060020 vaddr=42000020 size=990d8h (626904) map
I (348) esp_image: segment 3: paddr=000f9100 vaddr=3fc9a2I (349) esp_image: segment 4: paddr=000f9ed8 vaddr=403740I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=000000I (375) esp_image: Verifying image signature...
I (383) secure_boot_v2: Signature verified successfully!I (394) boot: Loaded app from partition at offset 0x20000
I (394) secure_boot_v2: enabling secure boot v2...
I (397) secure_boot_v2: secure boot v2 is already enabled, continuing..
I (405) boot: Checking flash encryption...
I (409) flash_encrypt: flash encryption is enabled (1 plaintext flashes left)
I (417) boot: Disabling RNG early entropy source...
I (434) cpu_start: Pro cpu up.
I (434) cpu_start: Starting app cpu, entry point is 0x4037546c
I (0) cpu_start: App cpu up.
I (449) cpu_start: Pro cpu start user code
I (449) cpu_start: cpu freq: 160000000 Hz
I (449) cpu_start: Application information:
I (452) cpu_start: Project name:     simple_ota
I (457) cpu_start: App version:      v5.1-dev-3462-g045163a2ec-dirty
I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19
I (470) cpu_start: ELF file SHA256:  83f8adcf9eb2f38I (578) app_start: Starting scheduler on CPU1
I (588) main_task: Calling app_main()
m
E (598) nvs: CONFIG_NVS_ENCRYPTION is enabled, but no partition with subtype nvs_keys found in the partition table.
ESP_ERROR_CHECK failed: esp_err_t 0xffffffff (ESP_FAIL) at 0x420093df
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/sfunc: app_main
expression: err
abort() was called at PC 0x4037cdeb on core 0
Backtrace: 0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2f38b
Rebooting...
ESP-ROM:esp32s3-20210327
Valid secure boot key blocks: 0
secure boot verification succeeded
load:0x3fce3978,len:0x3808
load:0x403cc700,len:0x528c
stage bootloader
I (70) boot: compile time Mar 13 2023 19:36:30
I (71) boot: chip revision: v0.1
I (75) boot.esp32s3: Boot SPI Speed : 80MHz
I (79) boot.esp32s3: SPI Mode       : DIO
I (84) boot.esp32s3: SPI Flash Size : 4MB
I (89) boot: Enabling RNG early entropy source...
I (94) boot: Partition Table:I (98) boot: ## Label            Usage          Type ST Offset   Length
00012000 00002000
00014000 00001000
00020000 00100000
00120000 00100000
I (151) boot: End of partition table
I (159) esp_image: segment 0: paddr=00020020 vaddr=3c0a0000 size=033d8h ( 13272)
I (376) esp_image: Verifying image signature...
I (376) secure_boot_v2: Verifying with RSA-PSS...
[0m
I (394) boot: Loaded app from partition at offset 0x20000
I (394) secure_boot_v2: enabling secure boot v2...
I (397) secure_boot_v2: secure boot v2 is already enabled, continuing..
I (409) flash_encrypt: flash encryption is enabled (1 plaI (457) cpu_start: App version:      v5.1-dev-3462-g04516I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19
I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g04516I (488) cpu_start: Max chip rev:     v0.99
I (493) cpu_start: Chip rev:         v0.1
I (518) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAAM
I (531) spi_flash: detected chip: gd
I (534) spi_flash: flash io: dio
W (538) spi_flash: Detected size(16384k) larger than the nary image header.
W (551) flash_encrypt: Flash encryption mode is DEVELOPMEI (566) sleep: Enable automatic switching of GPIO sleep configuration
I (588) simple_ota_example: OTA example app_main start
E (598) nvs: CONFIG_NVS_ENCRYPTION is enabled, but no parESP_ERROR_CHECK failed: esp_err_t 0xffffffff (ESP_FAIL) at 0x420093df
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
abort() was called at PC 0x4037cdeb on core 0
Backtrace: 0x4037592e:0x3fca2d90 0x4037cdf5:0x3fca2db0 0x40383626:0x3fca2dd0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2ea0 0x4037f7c5:0x3fca2ed0
ELF file SHA256: 83f8adcf9eb2rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x40375788
SPIWP:0xee
mode:DIO, clock div:1
Valid secure boot key blocks: 0
secure boot verification succeeded
load:0x403cc700,len:0x528c
stage bootloader
I (84) boot.esp32s3: SPI Flash Size : 4MB
I (105) boot:  0 nvs              WiFi data        01 02 0000e000 00004000
00012000 00002000
I (128) boot:  3 factory          factory app      00 00 00020000 00100000
00220000 00100000
20 size=3cb58h (248664) map
I (221) esp_image: segment 2: paddr=00060020 vaddr=42000020 size=990d8h (626904) map
00 size=12d18h ( 77080) load
I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=00000000 size=033d8h ( 13272)
I (375) esp_image: Verifying image signature...
I (376) secure_boot_v2: Verifying with RSA-PSS...
I (383) secure_boot_v2: Signature verified successfully!
I (394) secure_boot_v2: enabling secure boot v2...
, continuing..
I (405) boot: Checking flash encryption...
I (409) flash_encrypt: flash encryption is enabled (1 plaintext flashes left)
I (417) boot: Disabling RNG early entropy source...
I (0) cpu_start: App cpu up.
I (449) cpu_start: Pro cpu start user code
I (449) cpu_start: cpu freq: 160000000 Hz
I (449) cpu_start: Application information:
I (452) cpu_start: Project name:     simple_ota
I (457) cpu_start: App version:      v5.1-dev-3462-g045163a2ec-dirty
I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19[0m
I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g04516I (483) cpu_start: Min chip rev:     v0.0
c allocation:
M
AM
I (531) spi_flash: detected chip: gd
size in the binary image header(4096k). Using the size in the biI (560) sleep: Configure to isolate all GPIO pins in sleep state
I (566) sleep: Enable automatic switching of GPIO sleep configuration
I (573) app_start: Starting scheduler on CPU0
I (578) app_start: Starting scheduler on CPU1
I (578) main_task: Started on CPU0
I (588) simple_ota_example: OTA example app_main start[0E (598) nvs: CONFIG_NVS_ENCRYPTION is enabled, but no par093df
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
func: app_main
expression: err
abort() was called at PC 0x4037cdeb on core 0
Backtrace: 0x4037592e:0x3fca2d90 0x4037cdf5:0x3fca2db0 0x40383626:0x3fca2dd0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2f38b
Rebooting...
ESP-ROM:esp32s3-20210327
load:0x3fce3978,len:0x3808
entry 0x403c9904
I (70) boot: compile time Mar 13 2023 19:36:30
I (71) boot: chip revision: v0.1
I (75) boot.esp32s3: Boot SPI Speed : 80MHz
I (80) boot.esp32s3: SPI Mode       : DIO
I (84) boot.esp32s3: SPI Flash Size : 4MB
I (105) boot:  0 nvs              WiFi data        01 02 00012000 00002000
00020000 00100000
I (143) boot:  5 ota_1            OTA app          00 11 I (155) boot: Defaulting to factory image
I (218) esp_image: segment 1: paddr=0005cb80 vaddr=3fc96e00 size=03498h ( 13464) load
I (221) esp_image: segment 2: paddr=00060020 vaddr=42000020 size=990d8h (626904) map
98 size=00dd0h (  3536) load
00 size=033d8h ( 13272)
I (376) secure_boot_v2: Verifying with RSA-PSS...
I (394) secure_boot_v2: enabling secure boot v2...
intext flashes left)
I (449) cpu_start: Pro cpu start user code
I (449) cpu_start: cpu freq: 160000000 Hz
I (449) cpu_start: Application information:
I (457) cpu_start: App version:      v5.1-dev-3462-g04516I (505) heap_init: At 3FC9F1E0 len 0004A530 (297 KiB): DRI (511) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (518) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (524) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
W (538) spi_flash: Detected size(16384k) larger than the nary image header.
p state
I (566) sleep: Enable automatic switching of GPIO sleep configuration
I (573) app_start: Starting scheduler on CPU0
I (578) app_start: Starting scheduler on CPU1
I (578) main_task: Started on CPU0
I (588) main_task: Calling app_main()
093df
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
expression: err
abort() was called at PC 0x4037cdeb on core 0
Backtrace: 0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2ea0 0x4037f7c5:0x3fca2ed0
ELF file SHA256: 83f8adcf9eb2Saved PC:0x40375788
secure boot verification succeeded
load:0x3fce3978,len:0x3808
load:0x403c9700,len:0xbe8
I (69) boot: ESP-IDF v5.1-dev-3462-g045163a2ec-dirty 2nd I (84) boot.esp32s3: SPI Flash Size : 4MB
I (89) boot: Enabling RNG early entropy source...
I (94) boot: Partition Table:
I (98) boot: ## Label            Usage          Type ST Offset   Length
I (105) boot:  0 nvs              WiFi data        01 02 0000e000 00004000
I (113) boot:  1 otadata          OTA data         01 00 00012000 00002000
I (120) boot:  2 phy_init         RF data          01 01 00014000 00001000
I (128) boot:  3 factory          factory app      00 00 00020000 00100000
I (143) boot:  5 ota_1            OTA app          00 11 00220000 00100000
I (155) boot: Defaulting to factory image
20 size=3cb58h (248664) map
I (221) esp_image: segment 2: paddr=00060020 vaddr=42000020 size=990d8h (626904) map
00 size=033d8h ( 13272)
I (375) esp_image: Verifying image signature...
I (376) secure_boot_v2: Verifying with RSA-PSS...
I (383) secure_boot_v2: Signature verified successfully!
I (405) boot: Checking flash encryption...
I (417) boot: Disabling RNG early entropy source...
I (449) cpu_start: Pro cpu start user code
I (457) cpu_start: App version:      v5.1-dev-3462-g045163a2ec-dirty

I (470) cpu_start: ELF file SHA256:  83f8adcf9eb2f38b...I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g04516I (483) cpu_start: Min chip rev:     v0.0
c allocation:
I (505) heap_init: At 3FC9F1E0 len 0004A530 (297 KiB): DRAM
21 KiB): STAI (518) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAI (531) spi_flash: detected chip: gd
W (538) spi_flash: Detected size(16384k) larger than the size in the binary image header(4096k). Using the size in the binary image header.
I (560) sleep: Configure to isolate all GPIO pins in sleep state
I (578) app_start: Starting scheduler on CPU1
I (578) main_task: Started on CPU0
I (588) main_task: Calling app_main()
I (588) simple_ota_example: OTA example app_main startition with subtype nvs_keys found in the partition table.
ESP_ERROR_CHECK failed: esp_err_t 0xffffffff (ESP_FAIL) at 0x420093df
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
func: app_main
ea0 0x4037f7c5:0x3fca2ed0
ELF file SHA256: 83f8adcf9eb2f38b
Rebooting...
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x40375788
SPIWP:0xee
mode:DIO, clock div:1
Valid secure boot key blocks: 0
secure boot verification succeeded
I (70) boot: compile time Mar 13 2023 19:36:30
I (89) boot: Enabling RNG early entropy source...
I (98) boot: ## Label            Usage          Type ST Offset   Length
I (105) boot:  0 nvs              WiFi data        01 02 0000e000 00004000
I (113) boot:  1 otadata          OTA data         01 00 00012000 00002000
I (128) boot:  3 factory          factory app      00 00 I (135) boot:  4 ota_0            OTA app          00 10 00120000 00100000
I (143) boot:  5 ota_1            OTA app          00 11 00220000 00100000
I (151) boot: End of partition table
I (217) esp_image: segment 1: paddr=0005cb80 vaddr=3fc96e00 size=03498h ( 13464) load
I (348) esp_image: segment 3: paddr=000f9100 vaddr=3fc9a2I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=00000000 size=033d8h ( 13272)
[0m
I (394) boot: Loaded app from partition at offset 0x20000, continuing..
I (405) boot: Checking flash encryption...
I (409) flash_encrypt: flash encryption is enabled (1 plaintext flashes left)
I (417) boot: Disabling RNG early entropy source...
I (449) cpu_start: Pro cpu start user code
3a2ec-dirty
I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19
I (470) cpu_start: ELF file SHA256:  83f8adcf9eb2f38b...
I (483) cpu_start: Min chip rev:     v0.0
I (488) cpu_start: Max chip rev:     v0.99
I (493) cpu_start: Chip rev:         v0.1
I (498) heap_init: Initializing. RAM available for dynamiI (524) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRW (538) spi_flash: Detected size(16384k) larger than the size in the binary image header(4096k). Using the size in the bionfiguration
I (573) app_start: Starting scheduler on CPU0
I (578) app_start: Starting scheduler on CPU1
I (588) main_task: Calling app_main()
tition with subtype nvs_keys found in the partition table.
093df
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
func: app_main
0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2f38b
Rebooting...
ESP-ROM:esp32s3-20210327
mode:DIO, clock div:1
Valid secure boot key blocks: 0
secure boot verification succeeded
load:0x3fce3978,len:0x3808
load:0x403c9700,len:0xbe8
load:0x403cc700,len:0x528c
entry 0x403c9904
stage bootloader
I (70) boot: compile time Mar 13 2023 19:36:30
I (71) boot: chip revision: v0.1
I (75) boot.esp32s3: Boot SPI Speed : 80MHz
I (80) boot.esp32s3: SPI Mode       : DIO
I (105) boot:  0 nvs              WiFi data        01 02 0000e000 00004000
I (128) boot:  3 factory          factory app      00 00 00020000 00100000
I (143) boot:  5 ota_1            OTA app          00 11 00220000 00100000
I (151) boot: End of partition table
I (155) boot: Defaulting to factory image
I (218) esp_image: segment 1: paddr=0005cb80 vaddr=3fc96e00 size=03498h ( 13464) load
I (221) esp_image: segment 2: paddr=00060020 vaddr=42000098 size=00dd0h (  3536) load
I (350) esp_image: segment 4: paddr=000f9ed8 vaddr=40374000 size=12d18h ( 77080) load
I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=00000000 size=033d8h ( 13272)
I (376) esp_image: Verifying image signature...
I (376) secure_boot_v2: Verifying with RSA-PSS...
I (383) secure_boot_v2: Signature verified successfully!
I (394) boot: Loaded app from partition at offset 0x20000
I (410) flash_encrypt: flash encryption is enabled (1 plaintext flashes left)
I (417) boot: Disabling RNG early entropy source...
I (434) cpu_start: Pro cpu up.
I (434) cpu_start: Starting app cpu, entry point is 0x403I (0) cpu_start: App cpu up.
I (449) cpu_start: Pro cpu start user code
I (449) cpu_start: cpu freq: 160000000 Hz
I (457) cpu_start: App version:      v5.1-dev-3462-g045163a2ec-dirty
AM
I (511) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (524) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
W (538) spi_flash: Detected size(16384k) larger than the NT (not secure)
I (566) sleep: Enable automatic switching of GPIO sleep cI (578) main_task: Started on CPU0
I (588) main_task: Calling app_main()
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
func: app_main
0x4037592e:0x3fca2d90 0x4037cdf5:0x3fca2db0 0x40383626:0x3fca2dd0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2ea0 0x4037f7c5:0x3fca2ed0
ELF file SHA256: 83f8adcf9eb2secure boot verification succeeded
load:0x3fce3978,len:0x3808
I (69) boot: ESP-IDF v5.1-dev-3462-g045163a2ec-dirty 2nd I (70) boot: compile time Mar 13 2023 19:36:30
I (71) boot: chip revision: v0.1
I (94) boot: Partition Table:
0000e000 00004000
00014000 00001000
20 size=3cb58h (248664) map
I (217) esp_image: segment 1: paddr=0005cb80 vaddr=3fc96e00 size=03498h ( 13464) load
I (348) esp_image: segment 3: paddr=000f9100 vaddr=3fc9a298 size=00dd0h (  3536) load
I (349) esp_image: segment 4: paddr=000f9ed8 vaddr=40374000 size=12d18h ( 77080) load
I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=00000000 size=033d8h ( 13272)
I (375) esp_image: Verifying image signature...
I (376) secure_boot_v2: Verifying with RSA-PSS...
I (383) secure_boot_v2: Signature verified successfully!
intext flashes left)
I (417) boot: Disabling RNG early entropy source...
I (434) cpu_start: Starting app cpu, entry point is 0x403I (449) cpu_start: Pro cpu start user code
I (457) cpu_start: App version:      v5.1-dev-3462-g045163a2ec-dirty
[0m
AM
I (511) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (524) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
I (531) spi_flash: detected chip: gd
I (534) spi_flash: flash io: dio
W (538) spi_flash: Detected size(16384k) larger than the size in the binary image header(4096k). Using the size in the binary image header.
I (566) sleep: Enable automatic switching of GPIO sleep cI (573) app_start: Starting scheduler on CPU0
I (578) app_start: Starting scheduler on CPU1
I (578) main_task: Started on CPU0
I (588) simple_ota_example: OTA example app_main start
E (598) nvs: CONFIG_NVS_ENCRYPTION is enabled, but no partition with subtype nvs_keys found in the partition table.
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
abort() was called at PC 0x4037cdeb on core 0
Backtrace: 0x4037592e:0x3fca2d90 0x4037cdf5:0x3fca2db0 0x40383626:0x3fca2dd0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2Build:Mar 27 2021
rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x40375788
SPIWP:0xee
mode:DIO, clock div:1
Valid secure boot key blocks: 0
load:0x3fce3978,len:0x3808
entry 0x403c9904
stage bootloader
I (70) boot: compile time Mar 13 2023 19:36:30
I (89) boot: Enabling RNG early entropy source...
I (94) boot: Partition Table:
I (98) boot: ## Label            Usage          Type ST Offset   Length
I (113) boot:  1 otadata          OTA data         01 00 00012000 00002000
01 01 00014000 00001000
I (128) boot:  3 factory          factory app      00 00 00020000 00100000
I (135) boot:  4 ota_0            OTA app          00 10 I (143) boot:  5 ota_1            OTA app          00 11 00220000 00100000
I (151) boot: End of partition table
I (155) boot: Defaulting to factory image
I (217) esp_image: segment 1: paddr=0005cb80 vaddr=3fc96e00 size=03498h ( 13464) load
I (348) esp_image: segment 3: paddr=000f9100 vaddr=3fc9a298 size=00dd0h (  3536) load
00 size=12d18h ( 77080) load
[0m
I (397) secure_boot_v2: secure boot v2 is already enabled, continuing..
intext flashes left)
I (449) cpu_start: Pro cpu start user code
I (449) cpu_start: Application information:
I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19
I (470) cpu_start: ELF file SHA256:  83f8adcf9eb2f38b...
I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g045163a2ec-dirty
I (483) cpu_start: Min chip rev:     v0.0
I (488) cpu_start: Max chip rev:     v0.99
I (493) cpu_start: Chip rev:         v0.1
c allocation:
AM
I (518) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
AM
W (551) flash_encrypt: Flash encryption mode is DEVELOPMENT (not secure)
I (560) sleep: Configure to isolate all GPIO pins in sleep state
I (566) sleep: Enable automatic switching of GPIO sleep configuration
I (578) app_start: Starting scheduler on CPU1
I (578) main_task: Started on CPU0
I (588) main_task: Calling app_main()
E (598) nvs: CONFIG_NVS_ENCRYPTION is enabled, but no partition with subtype nvs_keys found in the partition table.
ESP_ERROR_CHECK failed: esp_err_t 0xffffffff (ESP_FAIL) at 0x420093df
expression: err
abort() was called at PC 0x4037cdeb on core 0
Backtrace: SPIWP:0xee
mode:DIO, clock div:1
Valid secure boot key blocks: 0
secure boot verification succeeded
load:0x3fce3978,len:0x3808
load:0x403c9700,len:0xbe8
I (70) boot: compile time Mar 13 2023 19:36:30
I (71) boot: chip revision: v0.1
I (75) boot.esp32s3: Boot SPI Speed : 80MHz
I (80) boot.esp32s3: SPI Mode       : DIO
I (84) boot.esp32s3: SPI Flash Size : 4MB
I (98) boot: ## Label            Usage          Type ST Offset   Length
0000e000 00004000
00012000 00002000
00120000 00100000
00220000 00100000
I (151) boot: End of partition table
I (160) esp_image: segment 0: paddr=00020020 vaddr=3c0a0000 size=03498h ( 13464) load
I (221) esp_image: segment 2: paddr=00060020 vaddr=42000020 size=990d8h (626904) map
I (350) esp_image: segment 4: paddr=000f9ed8 vaddr=40374000 size=12d18h ( 77080) load
I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=00000000 size=033d8h ( 13272)
I (394) boot: Loaded app from partition at offset 0x20000I (394) secure_boot_v2: enabling secure boot v2...
, continuing..
I (405) boot: Checking flash encryption...
I (410) flash_encrypt: flash encryption is enabled (1 plaintext flashes left)
I (417) boot: Disabling RNG early entropy source...
I (434) cpu_start: Pro cpu up.
I (434) cpu_start: Starting app cpu, entry point is 0x403I (0) cpu_start: App cpu up.
I (449) cpu_start: Pro cpu start user code
I (449) cpu_start: cpu freq: 160000000 Hz
I (449) cpu_start: Application information:
I (452) cpu_start: Project name:     simple_ota
3a2ec-dirty
I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19
I (488) cpu_start: Max chip rev:     v0.99
I (493) cpu_start: Chip rev:         v0.1
I (498) heap_init: Initializing. RAM available for dynamic allocation:
I (505) heap_init: At 3FC9F1E0 len 0004A530 (297 KiB): DRAM
CK/DRAM
I (518) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAAM
I (531) spi_flash: detected chip: gd
W (538) spi_flash: Detected size(16384k) larger than the size in the binary image header(4096k). Using the size in the bionfiguration
I (573) app_start: Starting scheduler on CPU0
I (578) app_start: Starting scheduler on CPU1
I (578) main_task: Started on CPU0
I (588) main_task: Calling app_main()
093df
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
func: app_main
Saved PC:0x40375788
mode:DIO, clock div:1
secure boot verification succeeded
load:0x3fce3978,len:0x3808
load:0x403cc700,len:0x528c
I (69) boot: ESP-IDF v5.1-dev-3462-g045163a2ec-dirty 2nd stage bootloader
I (70) boot: compile time Mar 13 2023 19:36:30
I (75) boot.esp32s3: Boot SPI Speed : 80MHz
I (84) boot.esp32s3: SPI Flash Size : 4MB
I (89) boot: Enabling RNG early entropy source...
I (94) boot: Partition Table:
I (98) boot: ## Label            Usage          Type ST Offset   Length
I (105) boot:  0 nvs              WiFi data        01 02 0000e000 00004000
I (143) boot:  5 ota_1            OTA app          00 11 I (151) boot: End of partition table
I (498) heap_init: Initializing. RAM available for dynamic allocation:
I (505) heap_init: At 3FC9F1E0 len 0004A530 (297 KiB): DRAM
I (511) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (524) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRI (534) spi_flash: flash io: dio
W (538) spi_flash: Detected size(16384k) larger than the size in the binary image header(4096k). Using the size in the binary image header.
W (551) flash_encrypt: Flash encryption mode is DEVELOPMEonfiguration
I (588) main_task: Calling app_main()
I (588) simple_ota_example: OTA example app_main startile: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
func: app_main
abort() was called at PC 0x4037cdeb on core 0
Backtrace: 0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2f38b
Rebooting...
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x40375788
SPIWP:0xee
mode:DIO, clock div:1
Valid secure boot key blocks: 0
secure boot verification succeeded
load:0x3fce3978,len:0x3808
load:0x403c9700,len:0xbe8
I (70) boot: compile time Mar 13 2023 19:36:30
I (71) boot: chip revision: v0.1
I (75) boot.esp32s3: Boot SPI Speed : 80MHz
I (79) boot.esp32s3: SPI Mode       : DIO
I (84) boot.esp32s3: SPI Flash Size : 4MB
I (89) boot: Enabling RNG early entropy source...
I (94) boot: Partition Table:
I (98) boot: ## Label            Usage          Type ST OI (105) boot:  0 nvs              WiFi data        01 02 0000e000 00004000
I (113) boot:  1 otadata          OTA data         01 00 00014000 00001000
00120000 00100000
I (143) boot:  5 ota_1            OTA app          00 11 00220000 00100000
I (151) boot: End of partition table
I (155) boot: Defaulting to factory image
I (159) esp_image: segment 0: paddr=00020020 vaddr=3c0a0020 size=3cb58h (248664) map
20 size=990d8h (626904) map
98 size=00dd0h (  3536) load
00 size=12d18h ( 77080) load
I (376) secure_boot_v2: Verifying with RSA-PSS...
I (383) secure_boot_v2: Signature verified successfully!I (394) secure_boot_v2: enabling secure boot v2...
I (397) secure_boot_v2: secure boot v2 is already enabled, continuing..
I (405) boot: Checking flash encryption...
I (409) flash_encrypt: flash encryption is enabled (1 plaintext flashes left)
I (434) cpu_start: Pro cpu up.
I (434) cpu_start: Starting app cpu, entry point is 0x4037546c
I (452) cpu_start: Project name:     simple_ota
I (457) cpu_start: App version:      v5.1-dev-3462-g045163a2ec-dirty
I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19
I (470) cpu_start: ELF file SHA256:  83f8adcf9eb2f38b...
I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g045163a2ec-dirty
I (483) cpu_start: Min chip rev:     v0.0
I (488) cpu_start: Max chip rev:     v0.99
I (493) cpu_start: Chip rev:         v0.1
c allocation:
I (511) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (518) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAI (524) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
I (531) spi_flash: detected chip: gd
I (534) spi_flash: flash io: dio
W (551) flash_encrypt: Flash encryption mode is DEVELOPMENT (not secure)
I (566) sleep: Enable automatic switching of GPIO sleep cI (573) app_start: Starting scheduler on CPU0
I (578) app_start: Starting scheduler on CPU1
I (578) main_task: Started on CPU0
I (588) main_task: Calling app_main()
m
E (598) nvs: CONFIG_NVS_ENCRYPTION is enabled, but no parESP_ERROR_CHECK failed: esp_err_t 0xffffffff (ESP_FAIL) at 0x420093df
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
expression: err
abort() was called at PC 0x4037cdeb on core 0
Backtrace: 0x4037592e:0x3fca2d90 0x4037cdf5:0x3fca2db0 0x40383626:0x3fca2ddf38b
Rebooting...
ESP-ROM:esp32s3-20210327
rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
Valid secure boot key blocks: 0
load:0x3fce3978,len:0x3808
load:0x403c9700,len:0xbe8
I (69) boot: ESP-IDF v5.1-dev-3462-g045163a2ec-dirty 2nd stage bootloader
I (70) boot: compile time Mar 13 2023 19:36:30
I (71) boot: chip revision: v0.1
I (80) boot.esp32s3: SPI Mode       : DIO
I (89) boot: Enabling RNG early entropy source...
0000e000 00004000
00012000 00002000
I (120) boot:  2 phy_init         RF data          01 01 00014000 00001000
I (135) boot:  4 ota_0            OTA app          00 10 00120000 00100000
I (143) boot:  5 ota_1            OTA app          00 11 00220000 00100000
I (155) boot: Defaulting to factory image
20 size=3cb58h (248664) map
I (348) esp_image: segment 3: paddr=000f9100 vaddr=3fc9a298 size=00dd0h (  3536) load
I (350) esp_image: segment 4: paddr=000f9ed8 vaddr=40374000 size=12d18h ( 77080) load
I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=00000000 size=033d8h ( 13272)
I (376) esp_image: Verifying image signature...
I (383) secure_boot_v2: Signature verified successfully!
I (394) secure_boot_v2: enabling secure boot v2...
, continuing..
7546c
I (452) cpu_start: Project name:     simple_ota
3a2ec-dirty
I (470) cpu_start: ELF file SHA256:  83f8adcf9eb2f38b...
I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g045163a2ec-dirty
I (483) cpu_start: Min chip rev:     v0.0
I (488) cpu_start: Max chip rev:     v0.99
I (493) cpu_start: Chip rev:         v0.1
I (498) heap_init: Initializing. RAM available for dynamic allocation:
I (505) heap_init: At 3FC9F1E0 len 0004A530 (297 KiB): DRI (511) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (518) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (524) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
I (531) spi_flash: detected chip: gd
I (534) spi_flash: flash io: dio
W (538) spi_flash: Detected size(16384k) larger than the size in the binary image header(4096k). Using the size in the biW (552) flash_encrypt: Flash encryption mode is DEVELOPMEI (560) sleep: Configure to isolate all GPIO pins in sleeI (566) sleep: Enable automatic switching of GPIO sleep cI (573) app_start: Starting scheduler on CPU0
E (598) nvs: CONFIG_NVS_ENCRYPTION is enabled, but no partition with subtype nvs_keys found in the partition table.
ESP_ERROR_CHECK failed: esp_err_t 0xffffffff (ESP_FAIL) at 0x420Build:Mar 27 2021
rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x40375788
SPIWP:0xee
Valid secure boot key blocks: 0
secure boot verification succeeded
load:0x3fce3978,len:0x3808
load:0x403c9700,len:0xbe8
load:0x403cc700,len:0x528c
entry 0x403c9904
I (69) boot: ESP-IDF v5.1-dev-3462-g045163a2ec-dirty 2nd stage bootloader
I (70) boot: compile time Mar 13 2023 19:36:30
I (79) boot.esp32s3: SPI Mode       : DIO
I (89) boot: Enabling RNG early entropy source...
I (98) boot: ## Label            Usage          Type ST Offset   Length
0000e000 00004000
I (113) boot:  1 otadata          OTA data         01 00 00012000 00002000
I (120) boot:  2 phy_init         RF data          01 01 00020000 00100000
I (135) boot:  4 ota_0            OTA app          00 10 I (143) boot:  5 ota_1            OTA app          00 11 I (155) boot: Defaulting to factory image
I (159) esp_image: segment 0: paddr=00020020 vaddr=3c0a00I (217) esp_image: segment 1: paddr=0005cb80 vaddr=3fc96e00 size=03498h ( 13464) load
20 size=990d8h (626904) map
98 size=00dd0h (  3536) load
I (349) esp_image: segment 4: paddr=000f9ed8 vaddr=40374000 size=12d18h ( 77080) load
I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=000000I (375) esp_image: Verifying image signature...
I (376) secure_boot_v2: Verifying with RSA-PSS...
[0m
I (405) boot: Checking flash encryption...
intext flashes left)
I (434) cpu_start: Pro cpu up.
I (434) cpu_start: Starting app cpu, entry point is 0x403
I (449) cpu_start: cpu freq: 160000000 Hz
I (449) cpu_start: Application information:
I (452) cpu_start: Project name:     simple_ota
3a2ec-dirty
I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19
[0m
AM
I (518) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAI (524) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
W (538) spi_flash: Detected size(16384k) larger than the onfiguration
I (578) app_start: Starting scheduler on CPU1
I (578) main_task: Started on CPU0
I (588) simple_ota_example: OTA example app_main start
tition with subtype nvs_keys found in the partition table.
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
func: app_main
expression: err
abort() was called at PC 0x4037cdeb on core 0
Backtrace: 0x4037592e:0x3fca2d90 0x4037cdf5:0x3fca2db0 0x40383626:0x3fca2dd0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2ea0 0x4037f7c5:0x3fca2ed0
ELF file SHA256: 83f8adcf9eb2Build:Mar 27 2021
load:0x403c9700,len:0xbe8
load:0x403cc700,len:0x528c
entry 0x403c9904
I (69) boot: ESP-IDF v5.1-dev-3462-g045163a2ec-dirty 2nd stage bootloader
I (70) boot: compile time Mar 13 2023 19:36:30
I (71) boot: chip revision: v0.1
I (75) boot.esp32s3: Boot SPI Speed : 80MHz
I (79) boot.esp32s3: SPI Mode       : DIO
I (98) boot: ## Label            Usage          Type ST Offset   Length
I (105) boot:  0 nvs              WiFi data        01 02 0000e000 00004000
I (113) boot:  1 otadata          OTA data         01 00 00012000 00002000
I (120) boot:  2 phy_init         RF data          01 01 00014000 00001000
I (128) boot:  3 factory          factory app      00 00 00020000 00100000
I (135) boot:  4 ota_0            OTA app          00 10 00120000 00100000
I (143) boot:  5 ota_1            OTA app          00 11 00220000 00100000
I (155) boot: Defaulting to factory image
I (159) esp_image: segment 0: paddr=00020020 vaddr=3c0a0020 size=3cb58h (248664) map
00 size=03498h ( 13464) load
20 size=990d8h (626904) map
I (348) esp_image: segment 3: paddr=000f9100 vaddr=3fc9a298 size=00dd0h (  3536) load
I (349) esp_image: segment 4: paddr=000f9ed8 vaddr=40374000 size=12d18h ( 77080) load
00 size=033d8h ( 13272)
I (376) secure_boot_v2: Verifying with RSA-PSS...
I (394) boot: Loaded app from partition at offset 0x20000
I (397) secure_boot_v2: secure boot v2 is already enabledI (405) boot: Checking flash encryption...
intext flashes left)
I (417) boot: Disabling RNG early entropy source...
I (434) cpu_start: Pro cpu up.
I (434) cpu_start: Starting app cpu, entry point is 0x4037546c
I (449) cpu_start: cpu freq: 160000000 Hz
I (457) cpu_start: App version:      v5.1-dev-3462-g04516I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19I (470) cpu_start: ELF file SHA256:  83f8adcf9eb2f38b...
I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g045163a2ec-dirty
c allocation:
AM
CK/DRAM
M
AM
W (538) spi_flash: Detected size(16384k) larger than the nary image header.
I (560) sleep: Configure to isolate all GPIO pins in sleeI (566) sleep: Enable automatic switching of GPIO sleep cI (573) app_start: Starting scheduler on CPU0
I (578) main_task: Started on CPU0
I (588) simple_ota_example: OTA example app_main start
E (598) nvs: CONFIG_NVS_ENCRYPTION is enabled, but no parESP_ERROR_CHECK failed: esp_err_t 0xffffffff (ESP_FAIL) at 0x420file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/sfunc: app_main
abort() was called at PC 0x4037cdeb on core 0
Backtrace: 0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2f38b
Rebooting...
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
Saved PC:0x40375788
mode:DIO, clock div:1
secure boot verification succeeded
load:0x3fce3978,len:0x3808
load:0x403c9700,len:0xbe8
entry 0x403c9904
I (69) boot: ESP-IDF v5.1-dev-3462-g045163a2ec-dirty 2nd stage bootloader
I (70) boot: compile time Mar 13 2023 19:36:30
I (89) boot: Enabling RNG early entropy source...
I (98) boot: ## Label            Usage          Type ST Offset   Length
I (113) boot:  1 otadata          OTA data         01 00 00012000 00002000
00020000 00100000
I (135) boot:  4 ota_0            OTA app          00 10 00120000 00100000
I (143) boot:  5 ota_1            OTA app          00 11 00220000 00100000
I (155) boot: Defaulting to factory image
I (218) esp_image: segment 1: paddr=0005cb80 vaddr=3fc96e00 size=03498h ( 13464) load
I (221) esp_image: segment 2: paddr=00060020 vaddr=42000020 size=990d8h (626904) map
I (348) esp_image: segment 3: paddr=000f9100 vaddr=3fc9a298 size=00dd0h (  3536) load
I (350) esp_image: segment 4: paddr=000f9ed8 vaddr=403740I (376) secure_boot_v2: Verifying with RSA-PSS...
I (383) secure_boot_v2: Signature verified successfully!
I (394) boot: Loaded app from partition at offset 0x20000
I (394) secure_boot_v2: enabling secure boot v2...
I (398) secure_boot_v2: secure boot v2 is already enabledI (405) boot: Checking flash encryption...
I (410) flash_encrypt: flash encryption is enabled (1 plaI (434) cpu_start: Pro cpu up.
I (434) cpu_start: Starting app cpu, entry point is 0x4037546c
I (0) cpu_start: App cpu up.
I (449) cpu_start: Pro cpu start user code
I (449) cpu_start: cpu freq: 16000I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19I (470) cpu_start: ELF file SHA256:  83f8adcf9eb2f38b...
I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g045163a2ec-dirty
I (483) cpu_start: Min chip rev:     v0.0
I (493) cpu_start: Chip rev:         v0.1
AM
I (511) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (518) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
AM
I (534) spi_flash: flash io: dio
W (538) spi_flash: Detected size(16384k) larger than the size in the binary image header(4096k). Using the size in the biW (552) flash_encrypt: Flash encryption mode is DEVELOPMEI (560) sleep: Configure to isolate all GPIO pins in sleeI (566) sleep: Enable automatic switching of GPIO sleep configuration
I (578) main_task: Started on CPU0
I (588) main_task: Calling app_main()
I (588) simple_ota_example: OTA example app_main start
E (598) nvs: CONFIG_NVS_ENCRYPTION is enabled, but no partition with subtype nvs_keys found in the partition table.
file: "/IDF/examples/system/ota/simple_ota_example.nosync/main/sfunc: app_main
abort() was called at PC 0x4037cdeb on core 0
Backtrace: 0x4037592e:0x3fca2d90 0x4037cdf5:0x3fca2db0 0x40383626:0x3fca2dd0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2f38b
Rebooting...
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
Saved PC:0x40375788
mode:DIO, clock div:1
secure boot verification succeeded
load:0x3fce3978,len:0x3808
load:0x403c9700,len:0xbe8
load:0x403cc700,len:0x528c
I (69) boot: ESP-IDF v5.1-dev-3462-g045163a2ec-dirty 2nd stage bootloader
I (70) boot: compile time Mar 13 2023 19:36:30
I (71) boot: chip revision: v0.1
I (75) boot.esp32s3: Boot SPI Speed : 80MHz
I (79) boot.esp32s3: SPI Mode       : DIO
I (84) boot.esp32s3: SPI Flash Size : 4MB
I (89) boot: Enabling RNG early entropy source...
I (94) boot: Partition Table:
I (98) boot: ## Label            Usage          Type ST Offset   Length
I (105) boot:  0 nvs              WiFi data        01 02 0000e000 00004000
I (113) boot:  1 otadata          OTA data         01 00 00020000 00100000
00120000 00100000
I (143) boot:  5 ota_1            OTA app          00 11 I (159) esp_image: segment 0: paddr=00020020 vaddr=3c0a0020 size=3cb58h (248664) map
00 size=03498h ( 13464) load
00 size=12d18h ( 77080) load
I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=00000000 size=033d8h ( 13272)
I (375) esp_image: Verifying image signature...
I (376) secure_boot_v2: Verifying with RSA-PSS...
I (383) secure_boot_v2: Signature verified successfully!
I (394) boot: Loaded app from partition at offset 0x20000I (434) cpu_start: Starting app cpu, entry point is 0x4037546c
[0m
I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g045163a2ec-dirty
I (483) cpu_start: Min chip rev:     v0.0
I (488) cpu_start: Max chip rev:     v0.99
I (493) cpu_start: Chip rev:         v0.1
I (498) heap_init: Initializing. RAM available for dynamiI (511) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (518) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (524) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRI (531) spi_flash: detected chip: gd
size in the binary image header(4096k). Using the size in the binary image header.
I (566) sleep: Enable automatic switching of GPIO sleep configuration
I (573) app_start: Starting scheduler on CPU0
I (578) app_start: Starting scheduler on CPU1
I (578) main_task: Started on CPU0
I (588) simple_ota_example: OTA example app_main startile: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
func: app_main
expression: err
abort() was called at PC 0x4037cdeb on core 0
Backtrace: 0x4037592e:0x3fca2d90 0x4037cdf5:0x3fca2db0 0x40383626:0x3fca2dd0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2f38b
Rebooting...
ESP-ROM:esp32s3-20210327
rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
Valid secure boot key blocks: 0
load:0x403cc700,len:0x528c
entry 0x403c9904
I (89) boot: Enabling RNG ear00012000 00002000
00014000 00001000
I (128) boot:  3 factory          factory app      00 00 00020000 00100000
I (135) boot:  4 ota_0            OTA app          00 10 00120000 00100000
I (143) boot:  5 ota_1            OTA app          00 11 I (151) boot: End of partition table
I (155) boot: Defaulting to factory image
20 size=3cb58h (248664) map
I (348) esp_image: segment 3: paddr=000f9100 vaddr=3fc9a298 size=00dd0h (  3536) load
00 size=12d18h ( 77080) load
I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=00000000 size=033d8h ( 13272)
I (375) esp_image: Verifying image signature...
I (376) secure_boot_v2: Verifying with RSA-PSS...
I (394) secure_boot_v2: enabling secure boot v2...
, continuing..
I (409) flash_encrypt: flash encryption is enabled (1 plaintext flashes left)
I (417) boot: Disabling RNG early entropy source...
I (449) cpu_start: Pro cpu start user code
I (449) cpu_start: cpu freq: 160000000 Hz
I (449) cpu_start: Application information:
I (452) cpu_start: Project name:     simple_ota
I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19
I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g045163a2ec-dirty
I (483) cpu_start: Min chip rev:     v0.0
I (493) cpu_start: Chip rev:         v0.1
c allocation:
W (538) spi_flash: Detected size(16384k) larger than the size in the binary image header(4096k). Using the size in the binary image header.
W (551) flash_encrypt: Flash encryption mode is DEVELOPMENT (not secure)
I (560) sleep: Configure to isolate all GPIO pins in sleep state
I (566) sleep: Enable automatic switching of GPIO sleep configuration
I (573) app_start: Starting scheduler on CPU0
tition with subtype nvs_keys found in the partition table.
093df
imple_ota_example.c" line 180
expression: err
0x4037592e:0x3fca2d90 0x4037cdf5:0x3fca2db0 0x40383626:0x3fca2dd0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2ea0 0x4037f7c5:0x3fca2ed0
ELF file SHA256: 83f8adcf9eb2f38b
Rebooting...
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x40375788
SPIWP:0xee
mode:DIO, clock div:1
load:0x403c9700,len:0xbe8
entry 0x403c9904
stage bootloader
I (71) boot: chip revision: v0.1
I (75) boot.esp32s3: Boot SPI Speed : 80MHz
I (80) boot.esp32s3: SPI Mode       : DIO
I (89) boot: Enabling RNG early entropy source...
I (98) boot: ## Label            Usage          Type ST OI (105) boot:  0 nvs              WiFi data        01 02 I (113) boot:  1 otadata          OTA data         01 00 I (120) boot:  2 phy_init         RF data          01 01 00014000 00001000
I (128) boot:  3 factory          factory app      00 00 00020000 00100000
I (135) boot:  4 ota_0            OTA app          00 10 00120000 00100000
I (143) boot:  5 ota_1            OTA app          00 11 00220000 00100000
I (151) boot: End of partition table
I (155) boot: Defaulting to factory image
I (160) esp_image: segment 0: paddr=00020020 vaddr=3c0a0020 size=3cb58h (248664) map
I (218) esp_image: segment 1: paddr=0005cb80 vaddr=3fc96e00 size=03498h ( 13464) load
I (221) esp_image: segment 2: paddr=00060020 vaddr=42000020 size=990d8h (626904) map
I (348) esp_image: segment 3: paddr=000f9100 vaddr=3fc9a2[0m
I (394) secure_boot_v2: enabling secure boot v2...
I (410) flash_encrypt: flash encryption is enabled (1 plaintext flashes left)
I (417) boot: Disabling RNG early entropy source...
I (434) cpu_start: Pro cpu up.
I (0) cpu_start: App cpu up.
I (449) cpu_start: Pro cpu start user code
I (449) cpu_start: cpu freq: 160000000 Hz
I (449) cpu_start: Application information:
I (452) cpu_start: Project name:     simple_ota
[0m
c allocation:
I (505) heap_init: At 3FC9F1E0 len 0004A530 (297 KiB): DRM
I (524) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRW (538) spi_flash: Detected size(16384k) larger than the size in the binary image header(4096k). Using the size in the biW (552) flash_encrypt: Flash encryption mode is DEVELOPMENT (not secure)
I (560) sleep: Configure to isolate all GPIO pins in sleeI (573) app_start: Starting scheduler on CPU0
I (578) app_start: Starting scheduler on CPU1
I (578) main_task: Started on CPU0
I (588) main_task: Calling app_main()
I (588) simple_ota_example: OTA example app_main start
ESP_ERROR_CHECK failed: esp_err_t 0xffffffff (ESP_FAIL) at 0x420093df
0x4037592e:0x3fca2d90 0x4037cdf5:0x3fca2db0 0x40383626:0x3fca2dd0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2ea0 0x4037f7c5:0x3fca2ed0
ELF file SHA256: 83f8adcf9eb2f38b
Rebooting...
ESP-ROM:esp32s3-20210327
Saved PC:0x40375788
mode:DIO, clock div:1
secure boot verification succeeded
load:0x3fce3978,len:0x3808
entry 0x403c9904
I (69) boot: ESP-IDF v5.1-dev-3462-g045163a2ec-dirty 2nd I (70) boot: compile time Mar 13 2023 19:36:30
I (71) boot: chip revision: v0.1
I (75) boot.esp32s3: Boot SPI Speed : 80MHz
I (79) boot.esp32s3: SPI Mode       : DIO
I (84) boot.esp32s3: SPI Flash Size : 4MB
0000e000 00004000
I (113) boot:  1 otadata          OTA data         01 00 I (120) boot:  2 phy_init         RF data          01 01 00014000 00001000
I (128) boot:  3 factory          factory app      00 00 00020000 00100000
I (135) boot:  4 ota_0            OTA app          00 10 00120000 00100000
I (143) boot:  5 ota_1            OTA app          00 11 00220000 00100000
I (151) boot: End of partition table
I (155) boot: Defaulting to factory image
I (159) esp_image: segment 0: paddr=00020020 vaddr=3c0a0020 size=3cb58h (248664) map
I (217) esp_image: segment 1: paddr=0005cb80 vaddr=3fc96e00 size=03498h ( 13464) load
I (221) esp_image: segment 2: paddr=00060020 vaddr=42000020 size=990d8h (626904) map
I (348) esp_image: segment 3: paddr=000f9100 vaddr=3fc9a298 size=00dd0h (  3536) load
I (349) esp_image: segment 4: paddr=000f9ed8 vaddr=40374000 size=12d18h ( 77080) load
I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=00000000 size=033d8h ( 13272)
I (375) esp_image: Verifying image signature...
I (376) secure_boot_v2: Verifying with RSA-PSS...
I (394) boot: Loaded app from partition at offset 0x20000I (394) secure_boot_v2: enabling secure boot v2...
I (397) secure_boot_v2: secure boot v2 is already enabled, continuing..
I (405) boot: Checking flash encryption...
I (0) cpu_start: App cpu up.
I (449) cpu_start: cpu freq: 160000000 Hz
3a2ec-dirty
I (464) cpu_start: Compile time:     Mar 23 2023 21:19:19[0m
I (476) cpu_start: ESP-IDF:          v5.1-dev-3462-g045163a2ec-dirty
I (488) cpu_start: Max chip rev:     v0.99
I (498) heap_init: Initializing. RAM available for dynamic allocation:
I (505) heap_init: At 3FC9F1E0 len 0004A530 (297 KiB): DRAM
I (511) heap_init: At 3FCE9710 len 00005724 (21 KiB): STAM
I (524) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
I (531) spi_flash: detected chip: gd
I (534) spi_flash: flash io: dio
W (538) spi_flash: Detected size(16384k) larger than the size in the binary image header(4096k). Using the size in the biNT (not secure)
I (566) sleep: Enable automatic switching of GPIO sleep cI (573) app_start: Starting scheduler on CPU0
I (578) app_start: Starting scheduler on CPU1
m
E (598) nvs: CONFIG_NVS_ENCRYPTION is enabled, but no parfile: "/IDF/examples/system/ota/simple_ota_example.nosync/main/simple_ota_example.c" line 180
0x4037592e:0x3fca2d90 0x4037cdf5:0x3fca2db0 0x40383626:0x3fca2dd0 0x4037cdeb:0x3fca2e40 0x420093df:0x3fca2e70 0x42098817:0x3fca2ea0 0x4037f7c5:0x3fca2ed0
ELF file SHA256: 83f8adcf9eb2f38b
Rebooting...
ESP-ROM:esp32s3-20210327
rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
Valid secure boot key blocks: 0
I (69) boot: ESP-IDF v5.1-dev-3462-g045163a2ec-dirty 2nd stage bootloader
I (70) boot: compile time Mar 13 2023 19:36:30
I (71) boot: chip revision: v0.1
I (75) boot.esp32s3: Boot SPI SpeedI (98) boot: ## Label            Usage          Type ST OI (105) boot:  0 nvs              WiFi data        01 02 0000e000 00004000
I (120) boot:  2 phy_init         RF data          01 01 00014000 00001000
I (128) boot:  3 factory          factory app      00 00 00020000 00100000
I (135) boot:  4 ota_0            OTA app          00 10 00120000 00100000
I (143) boot:  5 ota_1            OTA app          00 11 20 size=3cb58h (248664) map
I (348) esp_image: segment 3: paddr=000f9100 vaddr=3fc9a298 size=00dd0h (  3536) load
I (350) esp_image: segment 4: paddr=000f9ed8 vaddr=403740I (372) esp_image: segment 5: paddr=0010cbf8 vaddr=00000000 size=033d8h ( 13272)
I (375) esp_image: Verifying image signature...
I (376) secure_boot_v2: Verifying with RSA-PSS...
I (383) secure_boot_v2: Signature verified successfully!I (394) boot: Loaded app from partition at offset 0x20000
I (394) secure_boot_v2: enabling secure boot v2...
, continuing..
I (409) flash_encrypt: flash encryption is enabled (1 plaI (417) boot: Disabling RNG early entropy source...
I (434) cpu_start: Starting app cpu, entry point is 0x403I (0) cpu_start: App cpu up.
I (449) cpu_start: cpu freq: 160000000 Hz
I (449) cpu_start: Application information:
I (452) cpu_start: Project name:     simple_ota